• Title/Summary/Keyword: Cartesian Feedback Transmitter

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Improved Transmitter Power Efficiency using Cartesian Feedback Loop Chip

  • Chong, Young-Jun;Lee, Il-Kyoo;Oh, Seung-Hyeub
    • Journal of electromagnetic engineering and science
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    • v.2 no.2
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    • pp.93-99
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    • 2002
  • The Cartesian loop chip which is one of key devices in narrow-band Walky-Talky transmitter using RZ-SSB modulation method was designed and implemented with 0.35 Um CMOS technology. The reduced size and low cost of transmitter were available by the use of direct-conversion and Cartesian loop chip, which improved the power efficiency and linearity of transmitting path. In addition, low power operation was possible through CMOS technology. The performance test results of transmitter showed -23 dBc improvement of IMD level and -30 dEc below suppression of SSB characteristic in the operation of Cartesian loop chip (closed-loop). At that time, the transmitting power was about 37 dBm (5 W). The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

High-Power Cartesian Feedback Transmitter Design for 860 MHz Band (860 MHz 대역 고출력 Cartesian 피드백 송신기 설계)

  • Kim, Min-Su;Cho, Han-Jin;Ahn, Gun-Hyun;Jung, Sung-Chan;Park, Hyun-Chul;Van, Ju-Ho;Jeong, Jong-Hyuk;Kwon, Sung-Wook;Lim, Kyung-Hoon;Song, Sung-Chan;Klm, Jae-Young;Yang, Youn-Goo
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.2 s.117
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    • pp.183-190
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    • 2007
  • This paper presents the design of 860 MHz band transmitter for improving power amplifier's linearity using Cartesian feedback method. For eliminating the effects of gain, phase mis-match, and DC offset, we estimate the property variations using ADS software. The implemented Cartesian feedback transmitter exhibits IMD3 of -54 dBc at an output power of 43 dBm and this result shows that the linearity is improved for 22.4 dB, compared with the test of the power amplifier without Cartesian feedback system. Thus, we verify that the proposed Cartesian feedback transmitter can be applied to narrow-band transmitter systems.

Automatic Compensation for Cartesian Feedback Transmitter Imperfections Using the Binary Search Algorithm (이진 검색 알고리즘을 이용한 Cartesian Feedback 송신기 불완전성의 자동보상)

  • 임영희;이병로;임동민;이형수
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.10A
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    • pp.1507-1516
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    • 1999
  • 본 논문에서는 전력증폭기 선형화를 위한 Cartesian feedback 방식의 궤환 경로에서 발생하는 DC offset과 이득 및 위상 불일치를 자동적으로 보상하는 개선된 방식을 제안한다. Cartesian feedback에 의한 비선형 전력증폭기 왜곡성분의 감쇠 정도는 시스템 루프의 이득, 대역폭, 시간지연에 의해 결정된다고 알려져 있다. 그러나 궤환 경로 각 소자에서 발생하는 DC offset과 이득 및 위상의 불일치로 인하여 송신기의 출력신호에 원하지 않는 반송파 성분과 이미지 신호가 발생하여 궤환보상의 효과가 반감되는 결과를 초래한다. 본 논문에서는 디지털 신호처리 시스템 구조에서 이진 검색 (binary search) 알고리즘을 이용하여 궤환 경로에서 발생하는 DC offset과 이득 및 위상 불일치를 자동적으로 보상하는 방식을 제안하고 컴퓨터 모의실험을 통하여 제안된 방식의 성능을 분석한다. 모의실험에서 고려된 방식에 비하여 동일한 정도의 DC offset과 이득 및 위상 불일치의 보상에 걸리는 시간을 평균적으로 40% 단축할 수 있었다.

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Design of Cartesian Feedback Loop Linearization Chip for UHF Band (UHF 대역용 Cartesian Feedback Loop 선형화 칩 설계)

  • Kang, Min-Soo;Chong, Young-Jun;Oh, Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.5
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    • pp.510-518
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    • 2010
  • In this paper, the designed and implemented results of CFL linearization chip which can be used in mobile radio and TRS terminal of UHF band(380~910 MHz), using $0.6\;{\mu}m$ BiCMOS process based on Si, are shown. As gain control circuits for modifying transmit power are inserted not only in feedback path but also in forward path, the stability of CFL is maintained. And, DC-offset correction function of S/H structure, which is suitable for walkie-talkie PTT operation and is easily implemented, is realized. The performance test results of transmitter show that the regulation of FCC emission mask at PEP 3 W(34.8 dBm) is satisfied when the CQPSK modulated signal is fed and more than 30 dBc improvement of 3rd order IMD is achieved when two-tone signal is inputted.

Design of CFL Linearisation Chip for the Mobile Radio Using Ultra-Narrowband Digital Modulation (디지털 초협대역 단말기용 CFL 선형화 칩 설계)

  • Chong Young-Jun;Kang Min-Soo;Yoo Sung-Jin;Chung Tae-Jin;Oh Seung-Hyeub
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.7 s.98
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    • pp.671-680
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    • 2005
  • The CFL linearisation chip which is one of key devices in ultra-narrowband mobile radio transmitter using CQPSK digital modulation method is designed and implemented with $0.35{\mu}m$ CMOS technology. The reduced size and low cost of transmitter are available by the use of direct-conversion and CFL ASIC chip, which improve the power effi챠ency and linearity of transmitting path. In addition, low power operation is possible through CMOS technology The performance test results of transmitter show -25 dBc improvement of IMD level at the 3 kHz frequency offset and then satisfy FCC 47 CFR 90.210 E emission mask in the operation of CFL ASIC chip. At that time, the transmitting power is about PEP(Peak-to-Envelope Power) 5 W. The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.