• 제목/요약/키워드: Carrier tracking

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Digital Correlator Design for GPS/GLONASS Receiver (GPS/GLONASS 수신기용 디지털 상관기 설계)

  • 조득재;최일홍;박찬식;이상정
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.275-275
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    • 2000
  • This paper designs a digital correlator for the integrated GPS/GLONASS receiver consisting of DCO, carrier cycle counter, code generator, code phase counter, mixer, epoch counter, accumulator. It is designed using Verilog-HDL(Verilog-Hardware Description Language) and synthesized using EDA(Electronic Design Automation) tools. The performance of the designed digital correlator is verified by the functional simulation and real satellite tracking experiments.

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Susceptibility of Spoofing On A GPS L1 C/A Signal Tracking Loop (GPS L1 C/A 신호추적루프에서의 기만에 의한 영향)

  • Im, Sung-Hyuck;Im, Jun-Hyuck;Song, Jong-Hwa;Baek, Seung-Woock;Lee, In-Won;Lee, Dae-Yearl;Jee, Gyu-In
    • Journal of Advanced Navigation Technology
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    • v.15 no.1
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    • pp.32-38
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    • 2011
  • In this paper, code and carrier tracking error which resulted from spoofing signal was analyzed by simulation. For a start, the types of spoofing signals and methods were classified. For the simulation, search spoofing method is assumed because a perfect position and velocity are not generally informed to spoofing device. In most cases, the tracking error is increased but a complete deception does not happen because of the inherent anti-spoofing characteristics of the GPS signal.

An Unambiguous Multipath Error Mitigation Scheme for TMBOC and CBOC Signals (TMBOC과 CBOC 신호에 적합한 모호성이 낮은 다중경로 오차완화 기법)

  • Yoo, Seung-Soo;Jee, Gyu-In;Kim, Sun-Yong
    • Journal of Institute of Control, Robotics and Systems
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    • v.18 no.10
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    • pp.977-987
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    • 2012
  • One of the most significant errors in the pseudo-range measurement performance of GNSSes (Global Navigation Satellite Systems) is their multipath error for high-precision applications. Several schemes to mitigate this error have been studied. Most of them, however, have been focused on the GPS (Global Positioning System) L1 C/A (Coarse/Acquisition) signal that was designed in the 1970s and is still being used for civil navigation. Recently, several modernized signals that were especially conceived to more significantly mitigate multipath errors have been introduced, such as Time Multiplexed and Composite Binary Offset Carrier (TMBOC and CBOC, respectively) signals. Despite this advantage, however, a problem remains with the use of TMBOC and CBOC modulations: the ambiguity of BOC (Binary Offset Carrier)-modulated signal tracking. In this paper, a novel unambiguous multipath error mitigation scheme for these modernized signals is proposed. The proposed scheme has the same complexity as HRCs (High Resolution Correlators) but with low ambiguity. The simulation results showed that the proposed scheme outperformed or performed at par with the HRC in terms of their multipath error envelopes and running averages in the static and statistical channel models. The ranging error derived by the mean multipath error of the proposed scheme was below 1.8 meters in an urban area in the statistical channel model.

On the Design of Demodulator and Equalizer of 9600 BPS Modem (9600 BPS Modem의 복조기와 Equalizer에 관한 연구)

  • 장춘서;은종관
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.4
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    • pp.10-15
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    • 1983
  • In this paper effective methods of demodulation and equalization in a 9600 bps modem have been studied. To reduce the number of multiplications required per symbol in demodula-tion, the method of using a decimation filter is presented. In the equalizer the optimum step size and the steady state mean-squared error (MSE) are obtained from computer simulation results. The performance of the first-order carrier phase tracking loop is compared with that of the second-order loop when carrier frequency offset exists. In addition, the finite word length effects in the equalizer are studied.

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Technical Survey and Analysis of DSSS (직접대역확산방식 기술조사 및 분석)

  • Lim, You-Chol;Ma, Keun-Soo;Kim, Myung-Hwan;Lee, Jae-Deuk
    • Aerospace Engineering and Technology
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    • v.10 no.1
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    • pp.45-53
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    • 2011
  • This paper is technical review about Direct Sequence Spread Spectrum(DSSS) to apply in launch vehicle system. First, we introduce communication protocol(carrier frequency, code length, process gain, data rate, chip rate etc) about several application system using DSSS. And then, we survey and summarize the effect of doppler shift to the DSSS. The doppler shift is important error factor for PN code tracking in the fast moving system like launch vehicle. So, spread spectrum code acquisition technique for a direct sequence system in the presence of doppler effect must be investigated.

Design and BER Performance Evaluation for Digital Retrodirective Array Antenna systems (디지털 역 지향성 배열 안테나 시스템 설계와 성능 평가)

  • Kim, So-Ra;Lee, Seug Hwan;Shin, Dong Jin;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.3
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    • pp.217-223
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    • 2013
  • A digital retrodirective antenna system is easy to modify and upgrade because it can control the phase information of the output signal toward opposite direction to input signal without a priori knowledge of the arrival direction. Due to this advantage, it is possible to perform fast beam tracking. In this paper, a design digital retrosirective array antenna system according to the number of antenna array by using only one digital PLL which finds angle of delayed phase and we test BER performance of this system. When we transmit data at actual communication system, the data modulated onto carrier frequency in order to shift spectrum from base band to another band. So we simulate system considering carrier frequency according to the number of antenna array. As a result, carrier frequency has no impact on the performance.

An FPGA Design of High-Speed QPSK Demodulator (고속 무선 전송을 위한 QPSK 복조기 FPGA 설계)

  • 정지원
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.14 no.12
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    • pp.1248-1255
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    • 2003
  • High-speed QPSK demodulator has been one important design objective of any wireless communication systems, especially those offering broadband multimedia service. This paper describes Zero-Crossing IF-level(ZCIF) QPSK demodulator for high-speed wireless communications, and its hardware structures are discussed. ZCIF QPSK demodulator is mainly composed of symbol time circuit and carrier recovery circuit to estimate timing and phase-offsets. There are various schemes. Among them, we use Gardner algorithm and Decision-Directed carrier recovery algorithm which is most efficient scheme to warrant the fast acquisition and tracking to fabricate FPGA chip. The testing results of the implemented onto CPLD-FLEX10K chip show demodulation speed is reached up to 2.6[Mbps]. Actually in case of designing by ASIC, its speed may be faster than CPLD by 5 times. Therefore, it is possible to fabricate the ZCIF QPSK demodulator with speed of 10 Mbps.

Highly Linear and Efficient Microwave GaN HEMT Doherty Amplifier for WCDMA

  • Lee, Yong-Sub;Lee, Mun-Woo;Jeong, Yoon-Ha
    • ETRI Journal
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    • v.30 no.1
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    • pp.158-160
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    • 2008
  • A highly linear and efficient GaN HEMT Doherty amplifier for wideband code division multiple access (WCDMA) repeaters is presented. For better performance, the adaptive gate bias control of the peaking amplifier using the power tracking circuit and the shunt capacitors is employed. The measured one-carrier WCDMA results show an adjacent channel leakage ratio of -43.2 dBc at ${\pm}2.5$-MHz offset with a power added efficiency of 40.1% at an average output power of 37 dBm, which is a 7.5 dB back-off power from the saturated output power.

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Mixed $H_2/H_{\infty}$ Output Feedback Controller Design for PLL Loop Filter with Uncertainties and Time-delay (시간지연과 불확실성을 가지는 위상동기루프의 루프필터에 대한 혼합 $H_2/H_{\infty}$ 출력궤환 제어기 설계)

  • 이경호;한정엽;박홍배
    • Proceedings of the IEEK Conference
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    • 2003.07c
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    • pp.2589-2592
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    • 2003
  • In this paper, a robust mixed H$_2$/H$\_$$\infty$/ output feedback control method is applied to the design of loop filter for PLL carrier phase tracking. The proposed method successfully copes with large S-curve slope uncertainty and a significant decision delay in the closed-loop that may exist In modern receivers due to a convolutional decoder or an equalizer. The objective is to design an output feedback controller which minimizes the H$_2$performance while satisfying the H$\_$$\infty$/ performance to guarantee the gain margin and phase margin for linear time invariant(LTI) polytopic uncertain systems. LMIs based approach is given to solve this problem. We can verify the H$\_$$\infty$/ performance satisfaction and minimize the phase detector error through the simulation result.

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Design of a Two-dimensional Attitude Determining GPS Receiver (이차원 자세 측정용 GPS 수신기 설계)

  • 손석보;박찬식;이상정
    • Journal of the Korea Institute of Military Science and Technology
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    • v.3 no.2
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    • pp.131-139
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    • 2000
  • A design of CPS attitude determination system is described in this paper. The designed system is a low cost high precision 24 channel single frequency GPS(Global Positioning System) receiver which provides a precise absolute heading and pitch (or roll) as well as a position. It uses commercial chip-set and consists of two RF parts, two signal-tracking parts, a processor, memory parts and I/Os. In order to determine precise attitude, accurate carrier phase measurements and an efficient integer ambiguity resolution method are required. To meet these requirements, a PLL (Phase Locked Loops) is designed, and an algorithm called ARCE (Ambiguity Resolution with Constraint Equation) is adopted. The hardware and software structure of the system will be described, and the performance evaluated under various conditions will be presented. The test results will promise that more reliable navigation system be possible because the system provides all navigational information such as position, velocity, time and attitude.

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