• Journal of Power Electronics
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• 제16권1호
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• pp.163-172
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• 2016

The modular multilevel converter (MMC) has been receiving increased attentions in recent years. The new modular multilevel converter is a derivative topology from the traditional MMC in which the number of sub-modules (SMs) necessitated by each phase can be reduced by one. This paper presents a phase-shifted carrier pulse-width modulation (PSC-PWM) for the new MMC with an optimal phase-shifted angle to suppress the harmonics of the output voltage. Further, the harmonic features when the capacitor voltage of the middle SM is selected as two different values are also investigated. Moreover, in order to avoid introducing an unnecessary dc offset current at the ac terminals of the new MMC, a novel capacitor voltage balancing scheme is proposed by adjusting the amplitude of the reference signals rather than the offset. Finally, the validity and effectiveness of the proposed modulation and balancing schemes have been verified by experimental results based on a three-phase prototype of the new MMC.

• Journal of Power Electronics
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• 제16권2호
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• pp.512-521
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• 2016

Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

• Journal of Power Electronics
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• 제16권2호
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• pp.473-479
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• 2016

In this paper, the PSC PWM method is chosen as the optimal modulation method for a 20MW VSC HVDC, with consideration of the harmonic distortion of the output voltage, the switching frequency, and the control implementation difficulty. In addition, a new PSC PWM method is proposed in order to achieve an easy application and to solve the redundant control problems encountered in the previous PSC PWM method. To verify the proposed PSC PWM method, PSCAD/EMTDC simulations for an 11-level MMC RTDS HILS test and an 11-level MMC prototype converter test were performed. As can be seen from the results of these tests, the proposed PSC PWM method shows good results in an 11-level MMC with redundant sub-modules.

• Journal of Power Electronics
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• 제19권1호
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• pp.134-145
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• 2019

A single-phase step-up five-level inverter topology with a new phase-shifted pulse width modulation (PS-PWM) strategy is proposed in this paper. When compared with conventional single-phase five-level inverter topologies, the proposed topology can realize multilevel inversion with a double step-up ratio, a reduced number of switching devices and self-balanced capacitor voltages. When compared with the conventional PS-PWM strategy, the new PS-PWM strategy can be implemented with one carrier reduced, which makes it much easier to implement in a digital signal processor (DSP) system. Experimental results have been presented to verify the effectiveness of the proposed inverter and the PS-PWM strategy.

• 전기학회논문지
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• 제64권5호
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• pp.718-725
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• 2015

This paper proposes a novel level-shifted PWM (LS-PWM) strategy for fault tolerant cascaded multilevel inverter. Most proposed fault-tolerant operation methods in many of studies are based on a phase-shifted PWM (PS-PWM) method. To apply these methods to multilevel inverter systems using LS-PWM, two additional steps will be implemented. During the occurrence of a single-inverter-cell fault, the carrier bands scheme is reconfigured and modulation levels of inverter cells are reassigned in this proposed fault-tolerant operation. The proposed strategy performs balanced three-phase line-to-line voltages and line currents when a switching device fault occurs in a cascaded multilevel inverter using LS-PWM. Simulation and experimental results are included in the paper to verify the proposed method.

• Journal of Power Electronics
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• 제16권4호
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• pp.1336-1345
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• 2016

A modified space vector pulse width modulation (SVPWM) strategy based on vector space decomposition and its equivalent carrier-based PWM realization are proposed in this paper, which is suitable for six-phase asymmetrical dual stator induction machines (DSIMs). A DSIM is composed of two sets of symmetrical three-phase stator windings spatially shifted by 30 electrical degrees and a squirrel-cage type rotor. The proposed SVPWM technique can reduce torque ripples and suppress the harmonic currents flowing in the stator windings. Above all, the equivalent relationship between the proposed SVPWM technique and the carrier-based PWM technique has been demonstrated, which allows for easy implementation by a digital signal processor (DSP). Simulation and experimental results, carried out separately on a simulation system and a 3.0 kW DSIM prototype test bench, are presented and discussed.

• 전력전자학회논문지
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• 제10권5호
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• pp.443-449
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• 2005

본 논문에서는 연료 전지 시스템을 위한 Z-소스 인버터로 구성된 병렬 운전 시스템을 제시 하였다. PWM 방식으로는 Carrier phase shifted SPWM을 적용하였으며 이 방식은 출력 전류의 고조파 성분을 줄일 수 있는 장점을 갖는다. 그러나 이 기법을 Z-소스 인버터로 구성된 병렬 운전 시스템에 적용하는 경우 추가적으로 순환 전류를 발생한다. Z-소스 인버터로 구성된 병렬 운전 시스템이 동작 시 발생하는 순환 전류를 분석하고 순환 전류를 감소시키며, 부하전류에 낮은 고조파 성분을 가질 수 있도록 순환 전류 리액터를 사용하였다. 이에 대한 적합성을 시뮬레이션과 실험을 통해 입증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2020년도 전력전자학술대회
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• pp.316-317
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• 2020

In this paper, a novel six-level inverter is proposed. Voltage regulation is applied at DC-link and flying capacitors through the implementation of phase-shifted carrier-based modulation with zero-sequence voltage injection. The performance of the proposed structure has been verified under various modulation indices, where low voltage ripple is achieved at each capacitor and total harmonic distortions (THD) of line voltage at unity modulation index is about 15.95%.

• 조명전기설비학회논문지
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• 제21권3호
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• pp.56-61
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• 2007

본 논문에서는 연료전지 시스템을 위한 Z-소스 인버터로 구성된 병렬운전 연료전지 시스템의 순환전류 감쇄 방안을 검토하였다. PWM 방식으로는 Carrier phase shifted SPWM을 적용하였으며, 이 방식은 출력 전류의 고조파 성분을 줄일 수 있는 장점을 갖는다. 그러나 이 기법을 Z-소스 인버터로 구성된 병렬운전 시스템에 적용하는 경우 추가적으로 순환전류가 발생한다. Z-소스 인버터로 구성된 병렬운전 시스템이 동작 시 발생하는 순환전류를 감소시키며, 부하전류에 낮은 고조파 성분을 가질 수 있도록 커플링된 순환전류 리액터를 사용하였다. 순환전류 리액터를 상호 커플링시킴으로써 순환전류를 추가적으로 감소시킬 수 있다. 이에 대한 적합성을 시뮬레이션과 실험을 통해 입증하였다.

• 전력전자학회논문지
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• 제27권6호
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• pp.526-534
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• 2022

The modular multilevel converter (MMC) has been widely applied to various industrial areas because of its various advantages and structural characteristics. Therefore, many methods for synthesizing the output voltage of MMC have been studied. Among these methods, phase-shifted pulse width modulation (PSPWM) is frequently used in MMC systems because it has diverse merits, such as excellent output qualities even with a small number of cells and uniform power distribution among cells. In this study, the total harmonic distortion (THD) of the output voltage is analyzed in accordance with the number of cells in one arm of a single-delta bridge cell MMC in order to compare PSPWM methods in terms of the THD of the output voltage. The physical characteristics of the triangle and sawtooth carrier waves used for the PSPWM and the mathematical modeling of output voltage are introduced. Then, the obtained results are verified through real-time simulation of a 1 MW single-delta bridge cell MMC system.