• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.8
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• pp.1466-1477
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• 2016

This paper analyzes the electrical characteristic such as the impedance(Z), inductance(L), and cable resistance($R_p$) according to the change of cable length in order to move the electrical sorting device for distinguishing between AF non-insulated track circuits from the center of railway to outside railway. The simulation is performed to check the voltage difference between the voltage of sender and the voltage of receiver and determine the possibility of the voltage restoration availability in the frequency filter band through the capacitor compensation. It was applied to the results of the simulation to the sorting devices installed in the actual field. It is proved the availability by checking the measured voltage characteristic according to the capacitor compensating change of $10{\mu}F$ and $16{\mu}F$ before, and after the length of cable is increased with 6 meters. Through this, the prevention of breakdown and damage to facilities and the prevention the safety-related accidents of line workers from the train are expected according to moving the sorting devices of AR non-insulated track circuits to outside railway.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.63-70
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• 2013

This paper describes a high PSRR low-dropout(LDO) linear regulator for wide frequency range without output-capacitor. Owing to both of the cascode compensation technique and the current buffer compensation technique in nested Miller compensation loop, the proposed LDO not only maintaines high stability but also achieves high PSRR over wide frequency range with reasonable on-chip capacitances. Since the external capacitor is removed by the proposed compensation techniques, the cost for pad is eliminated. The designed LDO works under the input voltage range from 2.5V to 4.5V and provides up to 10mA load current with the output voltage of 1.8V. The LDO was implemented with 0.18um CMOS technology and the area is 300um X 120 um. The measured power supply rejection ratio(PSRR) is -76dB and -43dB at DC and 1MHz, respectively. The operating current is 25uA.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.2
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• pp.148-153
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• 2009

As the increasing of non-linear load, we have a growing interest in power quality. Power quality has come to the voltage quality. Voltage harmonics consist in at the PCC by the non-linear load. Capacitor is generally used for the power compensation and as the passive filter by the serial connection with reactor. Capacitor has low impedance as the frequency increases, so easily fall down by the harmonic component of non-linear load. Small voltage of low-order acts on quite a few at the capacitor by the current increase. In this paper, we measured the magnitude and angle of voltage at the PCC and calculated under the same condition. we checked out that lower voltage of higher order produces current magnification.

• Proceedings of the KIEE Conference
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• 2007.11c
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• pp.108-111
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• 2007

A novel voltage sag compensator with hi-directional DC/DC converter of Electric double layer capacitor is proposed. Recently, the double-layer capacitor which is drawn attention as a new energy storage element has a lot of advantage such as no maintenance, long lifetime and quick charge/discharge characteristics with large current. This DC/DC converter is used to control the charging current to the double-layer capacitor and also used to keep the DC link voltage constant for discharge of the double-layer capacitor. Therefore, the proposed DC/DC converter has the high-efficiency controller, dynamic compensator of voltage sag is driven by this converter. Finally, experimental results show the validity of the control scheme and the ability of the dynamic voltage compensator.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.8
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• pp.1457-1462
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• 2009

This paper proposes a compensating algorithm for the secondary voltage of a coupling capacitor voltage transformer (CCVT) in the time domain by considering the hysteresis characteristics of the core. The proposed algorithm estimates the three error terms i.e. the voltage across the secondary winding parameters, the voltage across the primary winding parameters, and the voltage across the capacitor and the tuning reactor. These three terms are added to the measured secondary voltage to obtain the correct voltage. The algorithm reduces the errors of the CCVT significantly both in the steady state and during a fault. The performance of the algorithm is verified under the various fault conditions by varying the fault distance, the fault inception angle, and the fault impedance with the EMTP generated data. Test results clearly indicate that the algorithm can increase the accuracy of a CCVT significantly under the fault conditions as well as in the steady state. The algorithm helps improve the performance of a protection relay or a metering device.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.2
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• pp.141-145
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• 2010

Most of the industrial loads includes the non-linear load as well as the linear load because there are many kinds of power conversion equipments at the input stage of the load in distribution network. The non-linear load causes the distortion of voltage waveform at PCC because the non-linear load generates the harmonic current. As a result, various voltage harmonics are existed at PCC depending on the current harmonics from the non-linear load. And, a series reactor is generally connected to the power capacitor in series to attenuate the distortion of voltage waveform and to reduce an inrush current of power capacitor. Also, harmonic current of power capacitor is highly dependent on the series reactor because it is operated with the power capacitor as a passive filter against nonlinear loads. Then, these capacitors might be damaged by the excessive voltage and current harmonic components. In this paper, we presented how to select the capacitor and series reactor to meet the requirement of the voltage distortion at PCC and analyzed the voltage, current and capacity rating of the power capacitor by the computer simulation to ensure the safe operation of power capacitor when the voltage harmonics at PCC are existed. Also, the analysis data were compared with the experimental measurements for the verification.

• ETRI Journal
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• v.30 no.6
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• pp.844-849
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• 2008

A new transcutaneous energy transmission (TET) system was developed for transmitting electrical power to an implanted device, such as an artificial heart in a patient's body. This new design can maintain a stable output voltage independent of the load resistance. The system includes a compensation capacitor to reduce energy loss and increase power transfer efficiency. Experimental results show that the output voltage of the receiving coil changes very little as the load resistance varies from 14.8 ${\Omega}$ to 15 $k{\Omega}$, which corresponds to a change in output power from 0.1 to 97 W.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.4
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• pp.57-64
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• 2011

Most of the user has been used linear load and non-linear load. The former is usually inductive load which is needed power factor compensation, the latter is power conversion system device. Actually two kinds of load is used together in the customer application. Generally capacitor is used for power-factor compensation of inductive load and reduction harmonics of non linear load with reactor. Non-linear load generates harmonic current for its energy conversion process. If harmonic current pass along the low impedance side of distribution system, the magnification of voltage and current is appeared by the series and parallel resonance. As a result, condenser has received a bitter electrical stress by the harmonic component. In this paper, we analyzed that how resonance is changed by the 5-th harmonic current pattern and proposed an alternative plan for non-magnification.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07b
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• pp.1093-1096
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• 2002

In this paper, a novel multi voltage inverter system is proposed for reductions of harmonics, which can compensate reactive power. At first, we remove capacitor at input side for reactive power compensation. Secondly, by adding DC voltage to the filter capacitor, it can control power factors as lead-phase according to alterations of loads at power reception. Thirdly, if winding and single phase-bridge inverter(auxiliary circuit) is installed to DC power for reduction of harmonic, waveform of output voltages become to 36-steps. Thus, SVC(static var compensator) systems which can reduce harmonics are designed.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.268-270
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• 1995

This paper proposes a novel PWM technique for a three phase current fad type converters. A minor loop compensation method is introduced to compensate leading current and to minimize input line current (Iu) distortion resulting from the resonance between AC filter capacitor and source inductance of power system. This PWM converter has excellent characterics as next. The control system is simply designed, and the operation with unity power factor can be easily obtained by automatic compensating the leading current of the filter circuit. Also. the three phase sinusoidal input current can be obtained.