• Title/Summary/Keyword: Capacitive Detection

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Design of a Capacitive Detection Circuit using MUX and DLC based on a vMOS (vMOS 기반의 DLC와 MUX를 이용한 용량성 감지회로)

  • Jung, Seung-Min
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.11 no.4
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    • pp.63-69
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    • 2012
  • This paper describes novel scheme of a gray scale capacitive fingerprint image for high-accuracy capacitive sensor chip. The typical gray scale image scheme used a DAC of big size layout or charge-pump circuit of non-volatile memory with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit of charge sharing scheme is proposed, which uses DLC(down literal circuit) based on a neuron MOS(vMOS) and analog simple multiplexor. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, a pixel layout size can be reduced and the image resolution can be improved.

A Study of a High Performance Capacitive Sensing Scheme Using a Floating-Gate MOS Transistor

  • Jung, Seung-Min
    • Journal of information and communication convergence engineering
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    • v.10 no.2
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    • pp.194-199
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    • 2012
  • This paper proposes a novel scheme of a gray scale fingerprint image for a high-accuracy capacitive sensor chip. The conventional grayscale image scheme uses a digital-to-analog converter (DAC) of a large-scale layout or charge-pump circuit with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit for the charge sharing scheme is proposed, which uses a down literal circuit (DLC) with a floating-gate metal-oxide semiconductor transistor (FGMOS) based on a neuron model. The detection circuit is designed and simulated in a 3.3 V, 0.35 ${\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, the pixel layout size can be reduced and the image resolution can be improved.

A CMOS integrated circuit design of charge-sharing scheme for a capacitive fingerprint sensor (용량형 지문인식센서를 위한 전하분할 방식 감지회로의 CMOS 구현)

  • Nam, Jin-Moon;Lee, Moon-Key
    • Journal of Sensor Science and Technology
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    • v.14 no.1
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    • pp.28-32
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    • 2005
  • In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

Design of Low Power Capacitive Sensing Circuit with a High Resolution in CMOS Technology

  • Jung, Seung-Min
    • Journal of information and communication convergence engineering
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    • v.9 no.3
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    • pp.301-304
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    • 2011
  • This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

Capacitive Sensing Circuit for Low Power and High Resolution

  • Jung, Seung-Min;Yeo, Hyeop-Goo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.692-695
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    • 2011
  • This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 35% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

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A Study on PD Detection Methods for Cast-resin Dry-type Transformers (몰드변압기의 부분방전 검출기술에 관한 연구)

  • Park, Chan-Yong;Park, Dae-Won;Choi, Jae-Sung;Kil, Gyung-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.9
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    • pp.786-791
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    • 2009
  • Transformer failures are mostly due to partial discharges (PDs) caused by the deteriorated insulation. It is, therefore, important to monitor PD occurrence in insulation system and prevent their deterioration. The presented paper deals with a PD detection method by a capacitive probe, which easily apply to cast - resin dry - type transformers. The PD detection system consists of a capacitive probe and a low noise amplifier having the frequency bandwidth of 500 $Hz{\sim}30$ MHz. In the experimental set-up, sensitivity of the system is 7.16 mV/pC.

Automatic Noise Removal and Peak Detection Algorithm for ECG Measured from Capacitively Coupled Electrodes Included within a Cloth Mattress Pad (침대 패드 형태의 용량성 전극에서 측정된 심전도 신호를 처리하기 위한 자동 잡음 제거 및 피크 검출 알고리즘)

  • Lee, Won Kyu;Lee, Hong Ji;Yoon, Hee Nam;Chung, Gih Sung;Park, Kwang Suk
    • Journal of Biomedical Engineering Research
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    • v.35 no.4
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    • pp.87-94
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    • 2014
  • Recent technological advances have increased interest in personal health monitoring. Electrocardiogram(ECG) monitoring is a basic healthcare activity and can provide decisive information regarding cardiovascular system status. In this study, we developed a capacitive ECG measurement system that can be included within a cloth mattress pad. The device permits ECG data to be obtained during sleep by using capacitive electrodes. However, it is difficult to detect R-wave peaks automatically because signals obtained from the system can include a high level of noise from various sources. Because R-peak detection is important in ECG applications, we developed an algorithm that can reduce noise and improve detection accuracy under noisy conditions. Algorithm reliability was evaluated by determining its sensitivity(Se), positive predictivity(+P), and error rate(Er) by using data from the MIT-BIH Polysomnographic Database and from our capacitive ECG system. The results showed that Se = 99.75%, +P = 99.77%, and Er = 0.47% for MIT-BIH Polysomnographic Database while Se = 96.47%, +P = 99.32%, and Er = 4.34% for our capacitive ECG system. Based on those results, we conclude that our R-peak detection method is capable of providing useful ECG information, even under noisy signal conditions.

Low Power Detection Circuit for a Capacitive Fingerprint Sensor (용량성 지문센서를 위한 저전력 감지회로)

  • Jung, Seung-Min
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.6
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    • pp.1343-1348
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    • 2011
  • A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than a conventional circuit. The detection circuit is designed and simulated in 3.3V, $0.35{\mu}m$ standard CMOS process, 40MHz condition. The result shows about 47% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is layout without area increasing of a one pixel.

Detection Technique of Partial Discharge by a Capacitive Probe in Cast-resin Transformers (몰드변압기에서 용량성 프로브에 의한 부분방전 검출 기술)

  • Jung, Kwang-Seok;Park, Dae-Won;Cha, Hyeon-Kyu;Cha, Sang-Wook;Kil, Gyung-Suk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.4
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    • pp.319-324
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    • 2011
  • This paper dealt with a partial discharge (PD) detection method for insulation diagnosis in cast-resin transformers. To detect PD pulse, a planar-capacitive probe was designed and fabricated. The probe has no insulation problem and can be installed on cast-resin transformers even in operation since it does not connect with high voltage conductor. The PD measurement system consists of the capacitive probe, a coupling network of 100 [kHz] low-cutoff frequency, and an amplifier with a gain of 40 [dB] and a frequency bandwidth of 500 [Hz]~45 [MHz]. A plane-needle and a plane-plane electrode system were fabricated to simulate insulation defects in a cast-resin transformer. Sensitivity of the PD measurement system, which is evaluated by a standard calibrator was 0.35 [mV/pC] for positive and 0.45 [mV/pC] for negative, respectively. The PD detection by the capacitive probe was less sensitive than that by a coupling capacitor according to IEC 60270, but we could analyze the magnitude and the phase distribution of PD pulse.

PD Detection in Air by Capacitive Electric Field Sensor (전계센서의 원리를 이용한 공기중 부분방전신호 검출)

  • Lee, Y.H.;Lee, K.W.;Park, S.H.;Kang, S.H.;Shin, Y.S.;Lim, K.J.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.900-903
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    • 2002
  • Partial discharges(PD) in air, corona discharges, deteriorate the insulation strength. So, it is necessary to detect PD at an early stage before the system failure and extensive damage to the equipment. PD emit signals which can be detected by applying an capacitive electric field diagnosis. In this paper, We measured signals by capacitive electric field sensor and analyzed FFT from PD, and then compared conventional electric PD detecting method to capacitive electric field diagnosis by $\Psi-q-n$, $\Psi-v-n$, $\Psi-n$, $\Psi-q$ distributions.

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