• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.852-855
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• 2012

A DC-DC converter for EEPROM IPs which perfom erasing by the FN (Fowler-Nordheim) tunneling and programming by the band-to-band tunneling is designed in this paper. For the DC-DC converter for EEPROM IPs using a low voltage of $1.5V{\pm}10%$ as the logic voltage, a scheme of using VRD (Read Voltage) instead of VDD is proposed to reduce the pumping stages and pumping capacitances of its charge pump circuit. VRD ($=3.1V{\pm}0.1V$) is a regulated voltage by a voltage regulator using an external voltage of 5V. The designed DC-DC converter outputs VPP (=8V) and VNN (=-8V) in the write mode.

• Journal of Power Electronics
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• v.18 no.3
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• pp.931-943
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• 2018

Wireless power transfer (WPT) technology has been the focus of a lot of research due to its safety and convenience. The Z-source inverter (ZSI) was introduced into WPT systems to realize improved system performance. The ZSI regulates the dc-rail voltage in WPT systems without front-end converters and makes the inverter bridge immune to shoot-through states. However, when the WPT system is combined with a ZSI, the system parameters must be configured to prevent the ZSI from entering an "accidental shoot-through" (AST) state. This state can increase the THD and decrease system power and efficiency. This paper presents a mathematical analysis for the characteristics of a WPT system and a ZSI while addressing the causes of the AST state. To deal with this issue, the impact of the system parameters on the output are analyzed under two control algorithms and the primary compensation capacitance range is derived in detail. To validate the analysis, both simulations and experiments are carried out and the obtained results are presented.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.36 no.12
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• pp.1497-1502
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• 2012

To manufacture a robot hand that essentially mimics the functions of a human hand, it is necessary to develop flexible actuators and sensors. In this study, we propose the design, manufacture, and performance verification of flexible actuators and sensors based on Electro Active Polymer (EAP). EAP is fabricated as a type of film, and it moves with changes in the voltage because of contraction and expansion in the polymer film. Furthermore, if a force is applied to an EAP film, its thickness and effective area change, and therefore, the capacitance also changes. By using this mechanism, we produce capacitive actuators and sensors. In this study, we propose an EAP-based capacitive sensor and evaluate its use as a robot hand sensor.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.106-106
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• 2000

반도체 소자가 미세화 됨에 따라 게이트 유전막으로 사용되는 SiO2의 박막화가 요구되나, boron penetration에 의한 Vt shift, 게이트 누설전류, 다결정 실리콘 게이트의 depletion effect 그리고 quantum mechanical effect 때문에 ~20 급에서 한계를 나타내고 있다. 이에 0.1$\mu\textrm{m}$이상의 design rule을 갖는 logic이나 memory 소자에서 요구되어지는 ~10 급 게이트 산화막은 SiO2(K=3.9)를 대신하여 고유전율을 갖는 재료의 채택이 필수 불가결하게 되었다. 고유전 박막 재료를 사용하면, 두께를 두껍게 해도 동일한 inversion 특성이 유지되고 carrier tunneling 이 덜하여 등가 산화막의 두께를 줄일 수 있다. 이러한 고유전박막 재료중 가장 활발히 연구되고 있는 재료는 Ta2O5, Al2O3, STO 그리고 BST 등이 있으나 Ta2O5, STO, BST 등은 실리콘 기판과 직접 반응을 한다는 문제를 가지고 있으며, Al2O3는 유전율이 낮의 재료가 최근 주목받고 있다. 본 실험에서는 ZrO2, HfO2 또는 그 silicates 등의 재료가 최근 주목 받고 있다. 본 실험에서는 ZrO2 박막의 증착조건에 따른 물리적, 전기적 특성 변화에 대하여 연구하였다. RCA 방식으로 세정한 P-type (100) 실리콘 기판위에 reactive DC sputtering 방법으로 압력 5mtorr, power 100~400W, 기판온도는 100-50$0^{\circ}C$로 변화시켜 ZrO2 박막을 증착한 후 산소와 아르곤 분위기에서 400-80$0^{\circ}C$, 10-120min으로 열처리하였다. 증착직후의 시편들과 열처리한 ZrO2 박막의 미세구조와 전기적 특성 변화를 관찰하였다. 우선 굴절율(RI)를 이용해 ZrO2 박막의 밀도를 예측하여 power와 기판온도에 따라 이론값 2.0-2.2 에 근접한 구조를 얻은 후 XRD, XPS, AFM, 그리고 TEM을 사용하여 ZrO2 박막의 chemical bonding, surface roughness 그리고 interfacial layer의 특성을 관찰하였다. 그리고 C-V, I-V measurement를 이용해 capacitance, 유전율, 누설전류 등의 전기적 특성을 관찰해 최적 조건을 설정하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.491-491
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• 2011

Transparent and flexible electronic devices that are light-weight, unbreakable, low power consumption, optically transparent, and mechanical flexible possibly have great potential in new applications of digital gadgets. Potential applications include transparent displays, heads-up display, sensor, and artificial skin. Recent reports on transparent and flexible field-effect transistors (tf-FETs) have focused on improving mechanical properties, optical transmittance, and performances. Most of tf-FET devices were fabricated with transparent oxide semiconductors which mechanical flexibility is limited. And, there have been no reports of transparent and flexible all-organic tf-FETs fabricated with organic semiconductor channel, gate dielectric, gate electrode, source/drain electrode, and encapsulation for sensor applications. We present the first demonstration of transparent, flexible all-organic sensor based on multifunctional organic FETs with organic semiconductor channel, gate dielectric, and electrodes having a capability of sensing infrared (IR) radiation and mechanical strain. The key component of our device design is to integrate the poly(vinylidene fluoride-triflouroethylene) (P(VDF-TrFE) co-polymer directly into transparent and flexible OFETs as a multi-functional dielectric layer, which has both piezoelectric and pyroelectric properties. The P(VDF-TrFE) co-polumer gate dielectric has a high sensitivity to the wavelength regime over 800 nm. In particular, wavelength variations of P(VDF-TrFE) molecules coincide with wavelength range of IR radiation from human body (7000 nm ~14000 nm) so that the devices are highly sensitive with IR radiation of human body. Devices were examined by measuring IR light response at different powers. After that, we continued to measure IR response under various bending radius. AC (alternating current) gate biasing method was used to separate the response of direct pyroelectric gate dielectric and other electrical parameters such as mobility, capacitance, and contact resistance. Experiment results demonstrate that the tf-OTFT with high sensitivity to IR radiation can be applied for IR sensors.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.5
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• pp.452-461
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• 1997

In this paper, we present a computer-aided design(CAD) technique for minimizing the phase shift in microstrip PIN diode attenuators due to the junction capacitance in the equivalent circuit model of PIN diode. Microstrip PIN diode attenuators use the characteristics which the reactance of microstrip line changes from inductive to capacitive as the frequency sweeps across the band. Microstrip PIN diode attenuator designed utilizes the quarter-wavelength transmission line terminating with the half-moon radial stub, which is designed for negligible phase shifting effect over the intersted bandwidth. The attenuator has similar phase shift at 0 dB and 10 dB of attenuation within average $1.27^{\circ}$ between 1.2GHz and 1.9GHz. The input and output return losses between 1.4 GHz and 1.9 GHz are less than 10 dB over the attenuation range of 0 dB and 10 dB.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.3 s.118
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• pp.257-264
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• 2007

In this paper, we have designed and fabricated a wide-band and high gain antenna which can integrate a standard of IEEE 802.1la$(5.15\sim5.25\;GHz,\;5.25\sim5.35\;GHz,\;5.725\sim5.825\;GHz)$. We inserted a parallel dual slot into a rectangular patch to have wide-band, and we offset an element of capacitance from the slot by using coaxial probe feeding method. We also designed a converter of $\lambda_g/4$ impedance with taper type line so that wide-band impedance can be matched easily. We finally designed structure with $2\times2$ array in order to improve the antenna gain, and the final fabricated antenna could have a good return loss(Return loss$\leq$-10 dB) and a high gain(over 13 dBi) at the range of $5.01\sim5.95\;GHz(B/W\doteqdot940\;MHz)$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.27 no.1
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• pp.20-26
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• 2016

This paper presents an X-band two-stage power amplifier using GaN-HEMT. Two-stage structure was adopted to take its high gain and simple inter-stage matching network. Based on a 3D EM simulation, the bond-wire inductance and the parasitic capacitance were predicted. By reducing bond-wire inductance, Q of the matching network is decreased and the bandwidth is improved. The implemented two-stage PA shows a power gain of more than 16 dB, saturated output power of more than 42.5 dBm, and a efficiency of more than 35 % in frequency range of 8.1~8.5 GHz with an operating voltage of 40 V.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.6
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• pp.427-434
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• 2013

In this paper, the design and layout of a 2.5 Gbps arrayed VCSEL driver for optical transceiver having arrayed multi-channel of integrating module is confirmed. In this paper, a 4 channel 2.5 Gbps VCSEL (vertical cavity surface emitting laser) driver array with automatic optical power control is implemented using $0.18{\mu}m$ CMOS process technology that drives a $1550{\mu}m$ high speed VCSEL used in optical transceiver. To enhance the bandwidth of the optical transmitter, active feedback amplifier with negative capacitance compensation is exploited. We report a distinct improvement in bandwidth, voltage gain and operation stability at 2.5Gbps data rate in comparison with existing topology. The 4-CH chip consumes only 140 mW of DC power at a single 1.8V supply under the maximum modulation and bias currents, and occupies the die area of $850{\mu}m{\times}1,690{\mu}m$ excluding bonding pads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.7
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• pp.23-29
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• 2012

The LC-based digitally controlled oscillator (LC-DCO), a key component of the all digital phase locked loop (ADPLL), is designed using $0.18{\mu}m$ RFCMOS process with 1.8 V supply. The NMOS core with double cross-coupled pair is chosen to realize wide tuning range, and the PMOS varactor pair that has small capacitance of a few aF and the capacitive degeneration technique to shrink the capacitive element are adopted to obtain the high frequency resolution. Also, the noise filtering technique is used to improve phase noise performance. Measurement results show the center frequency of 2.7 GHz, the tuning range of 2.5 GHz and the high frequency resolution of 2.9 kHz ~7.1 kHz. Also the fine tuning range and the current consumption of the core could be controlled by using the array of PMOS transistors using current biasing. The current consumption is between 17 mA and 26 mA at 1.8V supply voltage. The proposed DCO could be used widely in various communication system.