• Title/Summary/Keyword: Capacitance design

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Design of Repeater Duplexer having High Attenuation Characteristics of 800 MHz band (800MHz대 중계기용 고감쇠특성을 갖는 듀플렉서 설계)

  • 전동석;한진우;이상석
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.393-396
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    • 2000
  • Repeater Duplexer of 800MHz band consists of 4pole transmitter band pass filter, receiver band pass filter and branch circuit. Circuit parameter of Duplexer such as coupled capacitance of equivalent circuit was drawn out and used to coupled line characteristics impedance (Zoo, Zoe) that satisfied resonator condition and attenuation condition. Simulation was carried out by the ADS(Advanced Design System) were obtained good attenuation characteristics (869~894MHz: 65㏈(Min.),824~349MHz: 65㏈(Min.)

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Design parameters of embedded capacitors (내장형 캐패시터의 설계 파라미터 추출에 관한 연구)

  • 윤희선;유찬세;조현민;이영신;이우성;박종철
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2001.11a
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    • pp.61-66
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    • 2001
  • In this research, the design parameters of embedded capacitors are extracted by modeling and fabrication. The traditional library of capactor has a few problems in applying the circuit. Its capacitance is discrete, so target values in any circuit often can't be obtained in library, To solve this problem, the characteristics of capacitors are detected in the variation with the shape and structure, and then the capacitors with the expected reactance value at target frequency are obtained, In this procedure, 3-dimensional structure simulation is performed to predict the characteiristics of capacitors.

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Design of a Multiband Frequency Selective Surface

  • Kim, Dong-Ho;Choi, Jae-Ick
    • ETRI Journal
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    • v.28 no.4
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    • pp.506-508
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    • 2006
  • A frequency selective surface (FSS), whose unit cell consists of a ternary tree loop loaded with a modified tripole, is proposed to block multiple frequency bands. Target frequency bands correspond to Korean personal communication services, cellular mobile communication, and 2.4 GHz industrial, scientific, and medical bands. Through the adjustment of inter-element and inter-unit cell gaps, and adjustment of the length of elements, we present an FSS design method that makes the precise tuning of multiple resonance frequencies possible. Additionally, to verify the validity of our approach, simulation results obtained from a commercial software tool and experimental data are also presented.

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Low Power Design Using the Extraction of kernels (커널 추출을 이용한 저전력설계)

  • 이귀상;정미경
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.369-372
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    • 1999
  • In this paper, we propose a new method for power estimation in nodes of multi-level combinational circuits and describe its application to the extraction of common expressions for low power design. It is assumed that each node is implemented as a complex gate and the capacitance and the switching activity of the nodes are considered in the power estimation. Extracting common expressions which is accomplished mostly by the extraction of kernels, can be transformed to the problem of rectangle covering. We describe how the newly proposed estimation method can be applied to the rectangle covering problem and show the experimental results with comparisons to the results of SIS-1.2.

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Shielding 효과를 고려한 회로 설계 방법에 관한 연구

  • 김용규;권대한;황성우
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.413-416
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    • 2001
  • In high frequency range, RF circuit design without considering shielding effect can cause several significant changes due to increase in parasitic capacitance and inductance between RF signal lines and shielding box. In this paper, bandpass filter has been made to measure the shielding effect and its s-parameter has been measured by Vector Network Analyzer (VNA). Equivalent circuit model including the shielding effect has been constructed with the lumped elements extracted from the 3D electromagnetic simulator, Maxwell SI. Then, the validity of the model is verified using microwave circuit simulator, ADS (Advanced Design System).

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Accuracy Evaluation of the FinFET RC Compact Parasitic Models through LNA Design (LNA 설계를 통한 FinFET의 RC 기생 압축 모델 정확도 검증)

  • Jeong, SeungIk;Kim, SoYoung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.11
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    • pp.25-31
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    • 2016
  • Parasitic capacitance and resistance of FinFET transistors are the important components that determine the frequency performance of the circuit. Therefore, the researchers in our group developed more accurate parasitic capacitance and resistance for FinFETs than BSIM-CMG. To verify the RF performance, proposed model was applied to design an LNA that has $S_{21}$ more than 10dB and center frequency more than 60GHz using HSPICE. To verify the accuracy of the proposed model, mixed-mode capability of 3D TCAD simulator Sentaurus was used. $S_{21}$ of LNA was chosen as a reference to estimate the error. $S_{21}$ of proposed model showed 87.5% accuracy compared to that of Sentaurus in 10GHz~100GHz frequency range. The $S_{21}$ accuracy of BSIM-CMG model was 56.5%, so by using the proposed model, the accuracy of the circuit simulator improved by 31%. This results validates the accuracy of the proposed model in RF domain and show that the accuracies of the parasitic capacitance and resistance are critical in accurately predicting the LNA performance.

Design of Asymmetrical Parallel Coupled lines Using Finite Element Analysis (유한요소해석을 이용한 비대칭 평면형 결합선로 설계)

  • Youn, Jae-Ho;Park, Jun-Seok;Ahn, Dal;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1841-1843
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    • 2001
  • Asymmetrical parallel coupled lines are used in a number of circuits such as multi-band coupler and combline type band pass filter. Although graphical results and formulas are available for the design of coupled lines, the design procedure is hard to use, because even- and odd- mode impedances are always expressed in terms of the physical geometry. In this paper, we introduce a method to find design parameter using finite element analysis. By employing the capacitance obtained by FE analysis, design parameters for each lines are extracted. To show the validity of extracted design parameter for asymmetrical parallel coupled line, we have designed and simulated a planar type combline band pass filter.

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Impedance Characteristics of N2 Plasma and Matching Circuit Design (질소 플라즈마의 임피이던스 특성 및 정합회로 설계)

  • 황기웅;김원규
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.35 no.12
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    • pp.560-566
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    • 1986
  • In the design of an RF discharge system, the electrical equivalence of the gas discharge must be known. With this knowledge, one can design a suitable matching network for a maximum power transfer from the RF generator into the discharge. For this purpose, an experiment has been conducted in which the electrical impedance (conductance and capacitance) was determined as a function of power. In parallel with this, a detailed theoretical analysis has been done and the results are in accord with those of our experiment. Design equations are also given for a simple matching network, and a design example is presented to demonstrate its application. During the actual operation of an RF discharge system, however, it has been often observed that the reflected power tends to vary in small values due to the changes in the impedance of the system. This problem can be relieved by adding an automatic impedance matching circuit to the system and this paper presents such an automatic impedance matching network.

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Development and Application of TFT-LCD Pixel Design Tool (PDAST) (TFT-LCD 화소 설계 도구(PDAST)의 개발과 응용)

  • Lee, Yeong-Sam;Gwak, Ji-Hun;Choe, Jong-Seon
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.6
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    • pp.416-428
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    • 1999
  • A user-interactive pixel design tool for high-quality TFT-LCDs is realized and used to explore the sensitivity of the various array and device parameters for optimizing pixel design. In this tool, the Thompson cable equation and gradual-channel approximation were used for the gate time delay and TFT current modeling respectively. With this tool, each capacitance element, and TFT and array dimensions can be optimized under given design specifications. The electrical characteristics such ascharging ratio, gate time delay, pixel voltage level-shift, and holding ratio can be analyzed. The sensitivity analysis of those design parameters were executed and presented.

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Development of Optimum Parameters Sampling Program for Mica Capacitor Design (마이카 커패시터 설계를 위한 최적 파라미터 추출 프로그램 개발)

  • Kim, Jae-Wook;Ryu, Chang-Keun
    • Journal of IKEEE
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    • v.13 no.2
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    • pp.194-199
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    • 2009
  • In this study, ultra high-voltage (170kV AC), reliable 80pF mica capacitors for partial discharge system application were investigated. For capacitors design, Program was developed to sampling of series and parallel parameters. Mica was used as the dielectric of the capacitors. Using the conservative design rule, over 3 individual 50$\mu$m thick mica sheets with a size of 30mm$\times$35mm were used with lead foils to form a parallel capacitor element and 20 mica sheets were interleaved with lead foils to form a series stack of parallel capacitor element to meet the requirements of the capacitors. The dimension of the fabricated 80pF capacitor for 17kV AC were 90mm$\times$90mm. The high-frequency characteristics of the capacitance (C) and dissipation factor (D) of the developed capacitors were measured using a capacitance meter. The developed capacitor exhibited C of 79.5pF, had D of 0.001% over the frequency ranges of 150kHz to 50MHz, had a self-resonant frequency of 65MHz.

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