• Journal of Information Display
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• 제11권3호
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• pp.109-112
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• 2010

The solid phase compositions and dielectric properties of silicon nitride ($SiN_x$) films prepared using the plasma enhanced chemical vapor deposition (PECVD) technique at a low temperature ($200^{\circ}C$) were studied. Controlling the source gas mixing ratio, R = $[N_2]/[SiH_4]$, and the plasma power successfully produced both silicon-rich and nitrogen-rich compositions in the final films. The composition parameter, X, varied from 0.83 to 1.62. Depending on the film composition, the dielectric properties of the $SiN_x$ films also varied substantially. Silicon-rich silicon nitride (SRSN) films were obtained at a low plasma power and a low R. The photoluminescence (PL) spectra of these films revealed the existence of nano-sized silicon particles even in the absence of a post-annealing process. Nitrogen-rich silicon nitride (NRSN) films were obtained at a high plasma power and a high R. These films showed a fairly high dielectric constant ($\kappa$ = 7.1) and a suppressed hysteresis window in their capacitance-voltage (C-V) characteristics.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.452-455
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• 2003

[ $ZrO_2$ ] dielectric layers were grown on the p-type Si (100) substrate by metalorganic molecular beam epitaxy(MOMBE). Zrconium t-butoxide, $Zr(O{\cdot}t-C_4H_9)_4$ was used as a Zr precursor and Argon gas was used as a carrier gas. The thickness of the layers was measured by scanning electron microscopy (SEM) and the properties of the $ZrO_2$ layers were evaluated by X-ray diffraction, high frequency capacitance-voltage measurement. and HF C-V measurements have shown that $ZrO_2$ layer grown by MOMBE has a high dielectric constant (k=18-19). The growth rate is affected by various process variables such as substrate temperature, bubbler temperature, Ar, and $O_2$ gas flows.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제50권3호
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• pp.144-148
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• 2001

For the purpose of developing capacitive humidity sensor having interdigit electrodes, interdigit electrode was modeled and simulated to obtain capacitance and sensitivity as a function of geometric parameters like the structural gap and thichness. For the development of ASIC, switched capacitor signal conditioning circuits for capacitive humidity sensor were designed and simulated by cadence using 0.25um CMOS process parameters. The signal conditioning circuits are composed of amplifier for voltage gain control, and clock generator for sensor driving and switch control The characteristics of the fabricated sensors are; 1) sensitivity is 9fF/%R.H., 2) temperature coefficient of offset(TCO) is 0.4%R.H./$^{\circ}C$, 3) nonlinearity is 1.2%FS, 4) hysteresis is 1.5%FS in humidity range of 3%R.H. ${\sim}$ 98%R.H.. The response time is 50 seconds in adsorption and 70 seconds in desorption. Fabricated process used in this capacitive humidity sensor having interdigit electrode are just as similar as conventional IC process technology. Therefore this can be easily mass produced with low cost, simple circuit and utilized in many applications for both industrial and environmental measurement and control system, such as monitoring system of environment, automobile, displayer, IC process room, and laboratory etc..

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 C
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• pp.1417-1419
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• 1997

In this paper, the dielectric properties is made researches by the dose of electron beam in order to investigate the electrical properties for transformer oils due to electron beam irradiation. To measure the dielectric loss of irradiated specimen, the liquid electrode of coaxial cylindrical shape is used, and its geometric capacitance is 16 [pF]. And the dielectric dissipation factor, $tan{\delta}$, is measured by using the Video Bridge 2150. The thermal static oven with an automatic temperature controller is used so as to apply specific temperature to specimen. This experiments for measuring the dielectric loss is performed at $20{\sim}120[^{\circ}C]$ in temperature range, $30{\sim}1.5{\times}10^5[Hz]$ in frequency and $300{\sim}500[mV]$ in voltage.

• Journal of Magnetics
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• 제19권2호
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• pp.121-125
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• 2014

$CoFe_2O_4(CFO)/BaTiO_3(BTO)/CoFe_2O_4(CFO)$ multilayered thin films were deposited on $Pt/TiO_2/SiO_2/Si$ substrates by the pulsed laser deposition (PLD) system with KrF excimer laser (${\lambda}=248nm$). BTO, CFO, BTO/CFO and CFO/BTO/CFO structured thin films were prepared and their crystal structures and microstructures, as well as their magnetic and magneto-electrical properties, were studied. The C-V characteristics of these multilayered thin films with different capacitor structures were obtained to confirm the change in their capacitances under a magnetic field. Finally, the capacitance of the CFO/BTO/CFO thin film as a function of bias voltage under an in-plane magnetic field of 1,000 Oe increased to 951.04 pF at 1 MHz, from 831.90 pF measured under no magnetic field, indicating 14.3% increase in magnetocapacitance.

• ETRI Journal
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• 제19권4호
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• pp.402-413
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• 1997

A CMOS device which has an extended heavily-doped amorphous silicon source/drain layer on the field oxide and an amorphous silicon local interconnection (ASLI) layer in the self-aligned source/drain region has been studied. The ASLI layer has some important roles of the local interconnections from the extended source/drain to the bulk source/drain and the path of the dopant diffusion sources to the bulk. The junction depth and the area of the source/drain can be controlled easily by the ASLI layer thickness. The device in this paper not only has very small area of source/drain junctions, but has very shallow junction depths than those of the conventional CMOS device. An operating speed, however, is enhanced significantly compared with the conventional ones, because the junction capacitance of the source/drain is reduced remarkably due to the very small area of source/drain junctions. For a 71-stage unloaded CMOS ring oscillator, 128 ps/gate has been obtained at power supply voltage of 3.3V. Utilizing this proposed structure, a buried channel PMOS device for the deep submicron regime, known to be difficult to implement, can be fabricated easily.

• 산업진흥연구
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• 제3권1호
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• pp.1-5
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• 2018

$SnO_2$의 결정 변화에 따라서 달라지는 전기적인 특성을 조사하기 위해서 박막의 결정에 영향을 주는 열처릴 온도를 다르게 하여 $SnO_2$을 준비하였다. XRD, 커패시턴스, 전류전압 특성을 조사하여 서로 상관성을 조사하였다. $SnO_2$ 박막은 진공 중에서 열처리를 하면 접합계면에서 pn접합이 생기고 결정내부에는 많은 결함들이 생기면서 이온화에 의해 공핍층이 생성된다. 결함과 공핍층의 형성은 열처리 온도에 따라서 달라지며, 결정성, 결합에너지는 물론 결과적으로 전하량의 변화에 의해 전기적인 특성이 변화하는 것을 알 수 있었다. $SnO_2$ 박막은 열처리하면서 결정성이 높아졌으며, 150도 열처리한 $SnO_2$ 박막에서 쇼키전류가 형성되면서 증가하는 것을 확인하였다.

• 한국전기전자재료학회논문지
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• 제16권9호
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• pp.783-789
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• 2003

The winding problems of traction motor are the major determinant of motor's life. The root cause of winding failure is gradual deterioration of the insulation due to thermal, electrical, mechanical and environmental stresses. The aging of the insulation reduces the electrical and mechanical strength of the insulation. At same point, a voltage surge or mechanical shock from a traction motor start will fracture or break down the insulation. To achieve the expected life usually requires extensive laboratory evaluation of the insulation systems and the use of accelerated aging tests. There are several nondestructive test available for checking, the condition of motor insulation, the probable extent of aging, and the rate of which aging is taking place. So the insulation characteristics of stator coil were each analyzed by measurement of dielectric loss(tan$\sigma$), capacitance and partial discharge. The method of diagnosis is able to analyze the insulation condition and evaluate the life of the traction motor.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2005년도 춘계학술대회 논문집
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• pp.81-86
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• 2005

As the optical communication is introduced to the backbone network at first and becomes a general communication method of network, the demand of kernel parts of optical communication such as PLC(Planar Light Circuit), Coupler, and WDM(Wavelength Division Multiplexing) element increases. The alignment and the attachment technology are very important in the fabrication of optical elements. In this paper, the driving mechanism of ultra precision stage is studied with the aim of optimal design of stage. The travel and the resolution of stage are investigated. The hysteresis of the stage is generated because of PZT actuator. The hysteresis and the inverse hysteresis are modeled in X, Y, and Z-axis motion. The input data of desired displacement to the stage according to input voltage is obtained from the inverse hysteresis equation. In the result of experiments with the input data, the errors due to hysteresis are well compensated.

• Journal of Power Electronics
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• 제14권3호
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• pp.413-420
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• 2014

The conventional Phase-Shift Full-Bridge (PSFB) converter has a serious voltage spike because of the ringing between the leakage inductance of the transformer and the parasitic output capacitance of the secondary side rectifier switches. To overcome this problem, an asynchronous active clamp technique employing an auxiliary DC/DC converter has been proposed. However, an exact analyses for designing the auxiliary DC/DC converter has not been presented. Therefore, the amount of power that is supposed to be handled in the auxiliary DC/DC converter is calculated through a precise mode analyses in this paper. In addition, this paper proposes a lossy snubber circuit with hysteresis characteristics to reduce the burden that the auxiliary DC/DC converter should take during the starting interval. This technique results in optimizing the size of the magnetic component of the auxiliary DC/DC converter. The operational principles and the theoretical analyses are validated through experiments with a 48V-to-30V/15A prototype.