• 조명전기설비학회논문지
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• 제29권8호
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• pp.32-39
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• 2015

This paper presents the surface flashover mechanism of a laminated solid dielectric and describes the surface flashover characteristics with the inherent capacitance of the laminated solid dielectric in a $N_2/O_2$ mixture gas (8:2) under an quasi uniform field. It was found that the electron emission at a cathode and the high-local electric field region around an anode were important factors to reasonably describe the surface flashover mechanism. The surface flashover voltage by the mechanism decreased with the inherent capacitance increase of the laminated solid dielectric. In addition to the surface flashover mechanism and its characteristics, the surface flashover voltage equations as a function of the inherent capacitance were derived by considering a gas pressure used in future eco-friendly GIS and the factors influencing the surface flashover.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2015년도 제46회 하계학술대회
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• pp.1140-1140
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• 2015

In this paper, the MIM thin films were deposited on Si substrate by sputtering method. And MIM thin films were annealed at $400{\sim}600^{\circ}C$ using RTA. The capacitance density of MIM thin films were increased with the increase of annealing temperature. The maximum capacitance density of $0.62{\mu}F/cm^2$ was obtained by annealing temperature at $600^{\circ}C$. The voltage dependence of dielectric loss showed about 0.03 in voltage ranges of -10~+10 V.

• Journal of Electrochemical Science and Technology
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• 제9권1호
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• pp.9-19
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• 2018

The anodic behavior of aluminum (Al) foils with varying purity, capacitance, and withstand voltage in organic electrolytes was examined for EDLC. The results of cyclic voltammetry (CV) and chronoamperometry (CA) experiments showed that the electrochemical stability improves when Al foil has higher purity, lower capacitance, and higher withstand voltage. To improve the electrochemical stability of EDLC current collectors made of low-purity foil (99.4% Al foil), the foil was modified by chemical etching to reduce its capacitance to $60{\mu}F/cm^2$ and forming to have withstand a voltage of 3 Vf. EDLC cells using the modified Al foil as a current collector were made to 2.7 V with 360 F, and a constant voltage load test was subsequently performed for 2500 hours at high temperature under a rated voltage of 2.7 V. The reliability and stability of the EDLC cell improved when the modified Al foil was used as a current collector. To understand the deterioration process of the Al current collector, standard cells made of conventional Al foil under a constant voltage load test were disassembled, and the surface changes of the foil were measured every 500 hours. The Al foil became increasingly corroded, causing the adhesion between the AC coating layer and the Al foil to weaken, and it was confirmed that partial AC coating layer peeling occurred.

• Journal of Advanced Marine Engineering and Technology
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• 제23권2호
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• pp.159-167
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• 1999

This paper presents a new transient voltage blocking device(TOBD)which low power and high frequency bandwidth to protect info-communication facilities from transient voltages. Conventional protection devices have some problems such as low frequency bandwidth low ener-gy capacity and high remnant voltage. in order to improve these limitations a hybrid type TOBD which consists of a gas tube avalanche diodes and junction type field effect transistor (JFETs) is developed. The TOBD differs from the conventional protection devices in configuration and JFETs are used as an active non-linear element and a high speed switching diode with low capacitance limited high current. Therefore the avalanche diode with low energy capacity are protected from the high current and the TOBD has a very small input capacitance. From the performance test using combination surge generator which can produce $1.2/50{\mu}m$ 4.2 kV/max, $8/20{\mu}m$ 2.1 kAmax it is confirmed that the proposed TOBD has an excellent protection per-formance in tight clamping voltage and limiting current characteristics.

• 한국정보통신학회논문지
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• 제20권1호
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• pp.175-184
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• 2016

본 논문에서는 기존의 LCR 미터에 의한 측정방식이 아니라 C/V(capacitance to voltage) 변환 방식을 이용하여 커패시턴스를 측정하는 방법을 제안하였다. 그리고 다중채널용 초음파 프로브 진단장치를 구현하기 위해 192채널들을 6개의 MUX(multiplexer) 채널로 변환하는 아날로그 MUX 회로를 설계하였다. 각각의 MUX 채널 회로별 전압을 다시 커패시턴스로 변환하는 회로특성이 다르기 때문에 각각의 MUX 채널별 디지털전압을 커패시턴스로 변환하는 변환함수를 최소 자승법을 이용하여 유도하였다. 개발된 시제품의 성능시험결과로 1회 측정시간이 4초 이내로 측정되었고, 192개 채널들의 반복적인 측정에서 최대값, 최소값, 평균값에 대한 측정 오차값이 5% 이내의 시험결과가 제시되었다.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권10호
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 E
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• pp.2233-2235
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• 1999

The ac plasma display panel(PDP) is a flat light-emitting gas discharge device. Discharge gases directly take effects to the discharge phenomena of ac PDP. Therefore it is necessary to understand the characteristics of the discharge gases. In this paper, we have studied the effects of discharge gases by voltage transfer curves which show the discharge characteristics of ac PDP and the change of the effective wall capacitance during a discharge which depends on lateral spreading of charge distribution and the strength of discharge. As gas pressure increases, memory margins increases. and the firing voltage of a mixed gas is lower than that of a single gas such as He gas. The minimum sustain voltage and the maximum sustain voltage or firing voltage increases with decrease in the frequency. The effective wall capacitance increases as the discharge strength that is, the gap voltage between discharge electrodes increases.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.235-238
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• 2003

Photovoltaic(PV) array, which is generally installed outside, has the possibility to be damaged by high voltage due to lightning. Because the surge characteristics of PV array have not b eon fully Identified yet, there is a very important issue whether PV array should be connected with ground or not. In this paper, a basic model of PV array is provided considering the PV cell's barrier capacitance and ground capacitance for analysis of surge characteristics.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.1-5
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• 2000

This paper deals with the modeling and analysis of the high voltage flyback transformer (HVFBT) often utilized in small-sized high voltage DC power supplies. The parasitic capacitance of th HVFBT with the large turns of the secondary winding causes the undesirable parasitic resonance in the transient state which produces the high current stress and limits the switching frequency of the converter. In order to analyze this phenomenon the equivalent circuit model including the parasitic capacitance is derived and the frequency characteristics are provided. The parasitic resonance in the switching states is also investigated based on this equivalent circuit model. The derived model and analysis is finally validated through the SPICE simulation and experiments.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1992년도 하계학술대회 논문집 B
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• pp.820-824
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• 1992

An accurate method for extracting both Si film doping concentration and front or back silicon-to-oxide fixed charge density of fully depleted SOI devices is proposed. The method utilizes the current-to-voltage and capacitance-to-voltage characteristics of both SOI NMOSFET and PMOSFET which have the same doping concentration. The Si film doping concentration and the front or back silicon-to-oxide fixed charge density are extracted by mainpulating the respective threshold voltages of the SOI NMOSFET and PMOSFET according to the back surface condition (accumulation or inversion) and the capacitance-to-voltage characteristics of the SOI PMOSFET. Device simulations show that the proposed method has less than 10% errors for wide variations of the film doping concentration and the front or the back silicon-to-oxide fixed charge density.