• Title/Summary/Keyword: Capacitance Voltage Characteristics

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Fabrication of Aluminum Powder Disk by a Template Method and Its Etching Condition for an Electrode of Hybrid Supercapacitor (Template 방법을 이용한 Hybrid Supercapacitor 전극용 알루미늄 분말 디스크 제조와 에칭 조건 연구)

  • Jin, Chang-Soo;Lee, Yong-Sung;Shin, Kyung-Hee;Kim, Jong-Huy;Yoon, Soon-Gil
    • Journal of the Korean Electrochemical Society
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    • v.6 no.2
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    • pp.145-152
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    • 2003
  • Capacitance of a hybrid capacitor that has characteristics of both electrolyte capacitor and supercapacitor is determined by anode surface covered with oxide layer. In this study, optimal condition processes for anode to fabricate a high voltage hybrid capacitor was investigated. We mixed aluminum powder having mean particle size of $40{\mu}m$ with NaCl powders at weight ratio of 4 : 1 and prepared a disk type electrode after annealing at various temperature. After dissolving NaCl in $50^{\circ}C$ distilled water, heat treatment, eletropolishing, chemical treatment, and the first and the second etching of Al disk were conducted. In each process, capacitances and resistances of the disk measured by ac-impedance analyzer were compared to find its optimum treatment condition. Also, the surface morphology of treated disks were observed and compared by SEM. After the second etching, the Al disk was anodized at 365V to make an anode of hybrid supercapacitor that can be operated at 300V, Capacitance and resistance of the anodized Al disk electrode was compared with those of commercialized conventional aluminum electrolytic capacitor at different frequencies.

Al2O3/SiO2/Si(100) interface properties using wet chemical oxidation for solar cell applications

  • Min, Kwan Hong;Shin, Kyoung Cheol;Kang, Min Gu;Lee, Jeong In;Kim, Donghwan;Song, Hee-eun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.418.2-418.2
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    • 2016
  • $Al_2O_3$ passivation layer has excellent passivation properties at p-type Si surface. This $Al_2O_3$ layer forms thin $SiO_2$ layer at the interface. There were some studies about inserting thermal oxidation process to replace naturally grown oxide during $Al_2O_3$ deposition. They showed improving passivation properties. However, thermal oxidation process has disadvantage of expensive equipment and difficult control of thin layer formation. Wet chemical oxidation has advantages of low cost and easy thin oxide formation. In this study, $Al_2O_3$/$SiO_2/Si(100)$ interface was formed by wet chemical oxidation and PA-ALD process. $SiO_2$ layer at Si wafer was formed by $HCl/H_2O_2$, $H_2SO_4/H_2O_2$ and $HNO_3$, respectively. 20nm $Al_2O_3$ layer on $SiO_2/Si$ was deposited by PA-ALD. This $Al_2O_3/SiO_2/Si(100)$ interface were characterized by capacitance-voltage characteristics and quasi-steady-state photoconductance decay method.

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A Study on RF MEMS Switch with Comb Drive (Comb drive를 이용한 RF MEMS 스위치에 관한 연구)

  • Kang, Sung-Chan;Kim, Hyeon-Cheol;Chun, Kuk-Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.4
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    • pp.7-12
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    • 2008
  • This paper presents a lateral resistive contact RF MEMS switch using comb drive. Our goal was to fabricate the RF MEMS switch with high reliability and good RF characteristics for front end module in wireless transceiver system. Therefore, comb drive is used for large contact force in order to achieve low insertion loss and small off-state capacitance in order to achieve high isolation. The single crystalline silicon is used for mechanical reliability. As a result, the developed switch showed insertion loss less than 0.44 dB at 2 GHz, isolation greater than 60 dB, and low actuation voltage at 26 V.

Characteristics of Neutral Point Loci on Line Voltages to Hull When Insulation Resistance Collapses by Earthing Faults at 3 Phase Power Distribution Systems Onboard Vessels (선박 3상배전선로의 지락고장에 따른 대지전압 중성점의 이동경로 특성)

  • Choi, Soon-Man
    • Journal of Advanced Marine Engineering and Technology
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    • v.35 no.8
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    • pp.1117-1123
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    • 2011
  • Ungrounded power systems are adopted onboard vessels which enable more stabilized power supply even in case of electric leakage to hull. If earthing faults happen at these systems, they make grounding impedances of power lines unbalanced each other on the three phases, resulting in high voltages to hull which can bring more possibilities of electric shocks and electric fires. This study focuses on how to configure a calculation module for transferring a grounded condition by lowered insulation resistance into a vector diagram of the voltages to hull. By using the module, the loci of neutral points were acquired to analyze how voltages to hull are affected by earthing faults and the distributed capacitances between power lines and hull. The suggested module was simulated and compared to the measured values from a test power system in good results.

Characterization of Structure and Electrical Properties of $TiO_2$Thin Films Deposited by MOCVD (화학기상증착법에 의한$TiO_2$박막의 구조 및 전기적 특성에 관한 연구)

  • Choe, Sang-Jun;Lee, Yong-Ui;Jo, Hae-Seok;Kim, Hyeong-Jun
    • Korean Journal of Materials Research
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    • v.5 no.1
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    • pp.3-11
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    • 1995
  • $(TiO_{2})$ thin films were deposited on p-Si(100) substrate by APMOCVD using titanium isopropoxide as a source material. The deposition mechanism was well explained by the simple boundary layer theory and the apparent activation energy of the chemical reaction controlled process was 18.2kcal /mol. The asdeposited films were polycrystalline anatase phase and were transformed into rutile phase after postannealing. The postannealing time and the film thikness as well as the postannealing temperature also affected the phase transition. The C-V plot exhibited typical charateristics of MOS diode, from which the dielectric constant of about 80 was obtained. The capacitance of the annealed film was decreased but those of the Nb or Sr doped films were not changed. I-V characteristics revealed that the conduction mechanism was hopping conduction. The postannealing and the doping of Nb or Sr cause to decrease the leakage current and to increase the breakdown voltage.

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Design of Quaternary Logic gate Using Double Pass-transistor Logic with neuron MOS Threshold gate (뉴런 MOS 임계 게이트를 갖는 2중 패스-트랜지스터 논리를 이용한 4치 논리 게이트 설계)

  • Park, Soo-Jin;Yoon, Byoung-Hee;Kim, Heung-Soo
    • Journal of IKEEE
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    • v.8 no.1 s.14
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    • pp.33-38
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    • 2004
  • A multi-valued logic(MVL) pass gate is an important element to configure multi-valued logic. In this paper, we designed the Quaternary MIN(QMIN)/negated MIN(QNMIN) gate, the Quaternary MAX(QMAX)/negated MAX(QNMAX) gate using double pass-transistor logic(DPL) with neuron $MOS({\nu}MOS)$ threshold gate. DPL is improved the gate speed without increasing the input capacitance. It has a symmetrical arrangement and double-transmission characteristics. The threshold gates composed by ${\nu}MOS$ down literal circuit(DLC). The proposed gates get the valued to realize various multi threshold voltages. In this paper, these circuits are used 3V power supply voltage and parameter of 0.35um N-Well 2-poly 4-metal CMOS technology, and also represented HSPICE simulation results.

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Effect of post annealing on the structural and electrical properties of $Ba_{0.5}Sr_{0.5}TiO_3$ films deposited on 4H-SiC (4H-SiC에 증착된 BST 박막의 열처리 효과에 따른 구조적, 전기적 특성)

  • Lee, Jae-Sang;Jo, Yeong-Deuk;Bahng, Wook;Kim, Sang-Cheol;Kim, Nam-Kyun;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.196-196
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    • 2008
  • We have investigated that the effect of post annealing on the structural and electrical properties of $Ba_{0.5}Sr_{0.5}TiO_3$ thin films. The BST thin films were deposited on n-type 4H-silicon carbide(SiC) using pulsed laser deposition (PLD). The deposition was carried out in oxygen ambient 100mTorr for 5 minutes, which results in about 300nm-thick BST films. For the BST/4H-SiC, 200nm thick silver was deposited on the BST films bye-beam evaporation. The X-ray diffraction patterns of the BST films revealed that the crystalline structure of BST thin films has been improved after post-annealing at $850^{\circ}C$ for 1 hour. The root mean square (RMS) surface roughness of the BST film measured by using a AFM was increased after post-annealing from 5.69nm to 11.49nm. The electrical properties of BST thin film were investigated by measuring the capacitance-voltage characteristics of a silver/BST/4H-SiC structure. After the post-annealing, dielectric constant of the film was increased from 159.67 to 355.33, which can be ascribed to the enhancement of the crystallinity of BST thin films.

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An Analytical DC Model for HEMT's (헴트 소자의 해석적 직류 모델)

  • Kim, Young-Min
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.6
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    • pp.38-47
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    • 1989
  • A purely analytical model for HEMT's based on a two dimensional charge control simul-ation[4] is proposed. In this model proper treatment of diffusion effect of electron transport along a 2-DEG (two dimensional electron gas) channel is perfoemed. This diffusion effect is shown to effectively increase the bulk mibility and threshold voltage of the I-V curves compared to the existing models. The channel thickness and gate capacitance are expressed as functions of gate voltages covering subthreshold characteristics of HEMT's analytically. By introducing the finite channel opening and an effiective channel-length modulation, the solpe of the saturation region of the I-V curves ws modeled. The smooth transition of the I-V curves at linear-to-saturation regions of the I-V curves was possible using the continuous Troffimenkoff-type of field dependent mobility. Furthermore, a correction factor f was introduced to account for the finite transition section forming between a GCA and a saturated section. This factor removes large discrepancies in the saturation region of the I-V curve predicted by existing l-dimensional models.

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Analysis of Z-Source Inverters in Wireless Power Transfer Systems and Solutions for Accidental Shoot-Through State

  • Wang, Tianfeng;Liu, Xin;Jin, Nan;Ma, Dianguang;Yang, Xijun;Tang, Houjun;Ali, Muhammad;Hashmi, Khurram
    • Journal of Power Electronics
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    • v.18 no.3
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    • pp.931-943
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    • 2018
  • Wireless power transfer (WPT) technology has been the focus of a lot of research due to its safety and convenience. The Z-source inverter (ZSI) was introduced into WPT systems to realize improved system performance. The ZSI regulates the dc-rail voltage in WPT systems without front-end converters and makes the inverter bridge immune to shoot-through states. However, when the WPT system is combined with a ZSI, the system parameters must be configured to prevent the ZSI from entering an "accidental shoot-through" (AST) state. This state can increase the THD and decrease system power and efficiency. This paper presents a mathematical analysis for the characteristics of a WPT system and a ZSI while addressing the causes of the AST state. To deal with this issue, the impact of the system parameters on the output are analyzed under two control algorithms and the primary compensation capacitance range is derived in detail. To validate the analysis, both simulations and experiments are carried out and the obtained results are presented.

Thermal Stability and Electrical Properties of $HfO_xN_y$ ($HfO_2$) Gate Dielectrics with TaN Gate Electrode (TaN 게이트 전극을 가진 $HfO_xN_y$ ($HfO_2$) 게이트 산화막의 열적 안정성)

  • Kim, Jeon-Ho;Choi, Kyu-Jeong;Yoon, Soon-Gil;Lee, Won-Jae;Kim, Jin-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.54-57
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    • 2003
  • [ $HfO_xN_y$ ] films using a hafnium tertiary-butoxide $(Hf[OC(CH_3)_3]_4)$ in plasma and $N_2$ ambient were prepared to improve the thermal stability of hafnium-based gate dielectrics. A 10% nitrogen incorporation into $HfO_2$ films showed a smooth surface morphology and a crystallization temperature as high as $200^{\circ}C$ compared with pure $HfO_2$ films. The $TaN/HfO_xN_y/Si$ capacitors showed a stable capacitance-voltage characteristics even at post-metal annealing temperature of $1000^{\circ}C$ in $N_2$ ambient and a constant value of 1.6 nm EOT (equivalent oxide thickness) irrespective of an increase of PDA and PMA temperature. Leakage current densities of $HfO_xN_y$ capacitors annealed at PDA temperature of 800 and $900^{\circ}C$, respectively were approximately one order of magnitude lower than that of $HfO_2$ capacitors.

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