• 제목/요약/키워드: CMOS integrated circuits

검색결과 147건 처리시간 0.027초

Design of Circuit for a Fingerprint Sensor Based on Ridge Resistivity

  • Jung, Seung-Min
    • Journal of information and communication convergence engineering
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    • 제6권3호
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    • pp.270-274
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    • 2008
  • This paper proposes an advanced signal processing circuit for a fingerprint sensor based on ridge resistivity. A novel fingerprint integrated sensor using ridge resistivity variation resulting from ridges and valleys on the fingertip is presented. The pixel level simple detection circuit converts from a small and variable sensing current to binary voltage out effectively. The sensor circuit blocks were designed and simulated in a standard CMOS 0.35 ${\mu}m$ process.

CMOS 집적회로의 테스팅을 위한 새로운 내장형 전류감지 회로의 설계 (Design of a Built-In Current Sensor for CMOS IC Testing)

  • 홍승호;김정범
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 A
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    • pp.271-274
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    • 2003
  • This paper presents a Built-in Current Sensor that detect defects in CMOS integrated circuits using the current testing technique. This scheme employs a cross-coupled connected PMOS transistors, it is used as a current comparator. Our proposed scheme is a negligible impart on the performance of the circuit undo. test (CUT). In addition, in the normal mode of the CUT not dissipation extra power, high speed detection time and applicable deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The entire area of the test chip is $116{\times}65{\mu}m^2$. The BICS occupies only $41{\times}17{\mu}m^2$ of area in the test chip. The area overhead of a BICS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS technology.

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IDDQ 테스팅을 위한 내장형 전류 감지 회로 설계 (Design of a Built-In Current Sensor for IDDQ Testing)

  • 김정범;홍성제;김종
    • 전자공학회논문지C
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    • 제34C권8호
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    • pp.49-63
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    • 1997
  • This paper presents a current sensor that detects defects in CMOS integrated circuits using the current testing technique. The current sensor is built in a CMOS integrated circuit to test an abnormal current. The proposed circuit has a very small impact on the performance of the circuit under test during the normal mode. In the testing mode, the proposed circuit detects the abnormal current caused by permanent manufacturing defects and determines whether the circuit under test is defect-free or not. The proposed current sensor is simple and requires no external voltage and current sources. Hence, the circuit has less area and performance degradation, and is more efficient than any previous works. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects.

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Silicon-based 0.69-inch AMOEL Microdisplay with Integrated Driver Circuits

  • Na, Young-Sun;Kwon, Oh-Kyong
    • Journal of Information Display
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    • 제3권3호
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    • pp.35-43
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    • 2002
  • Silicon-based 0.69-inch AMOEL microdisplay with integrated driver and timing controller circuits for microdisplay applications has been developed using 0.35 ${\mu}m$ l-poly 4-metal standard CMOS process with 5 V CMOS devices and CMP (Chemical Mechanical Polishing) technology. To reduce the large data programming time consumed in a conventional current programming pixel circuit technique and to achieve uniform display, de-amplifying current mirror pixel circuit and the current-mode data driver circuit with threshold roltage compensation are proposed. The proposed current-mode data driver circuit is inherently immune to the ground-bouncing effect. The Monte-Carlo simulation results show that the proposed current-mode data driver circuit has channel-to-channel non-uniformity of less than ${\pm}$0.6 LSB under ${\pm}$70 mV threshold voltage variaions for both NMOS and PMOS transistors, which gives very good display uniformity.

전류법 기반 센서의 정전압 분극 장치 회로 (Potentiostat circuits for amperometric sensor)

  • 임신일
    • 센서학회지
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    • 제18권1호
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    • pp.95-101
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    • 2009
  • A simple and new CMOS potentiostat circuit for amperometric sensor is described. To maintain a constant potential between the reference and working electrodes, only one differential difference amplifier (DDA) is needed in proposed design, while conventional potentiosatat requires at least 2 operational amplifiers and 2 resistors, or more than 3 operational amplifiers and 4 resistors for low voltage CMOS integrated potentiostat. The DDA with rail-to-rail design not only enables the full range operation to supply voltage but also provides simple potentiostat system with small hardwares and low power consumption.

A 1.2-V 0.18-${\mu}m$ Sigma-Delta A/D Converter for 3G wireless Applications

  • Kim, Hyun-Joong;Jung, Tae-Sung;Yoo, Chang-sik
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.627-628
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    • 2006
  • A low-voltage switched-capacitor $2^{nd}$-order $\Sigma\Delta$ modulator using full feed-forward is introduced. It has two advantages: the unity signal transfer function and reduced signal swings inside the $\Sigma\Delta$ loop. These features greatly relax the DC gain and output swing requirements for Op-Amp in the low-voltage $\Sigma\Delta$ modulator. Implemented by a 0.18-${\mu}m$ CMOS technology, the $\Sigma\Delta$ modulator satisfies performance requirements for WCDMA and CDMA2000 standards.

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High performance inkjet printed polymer CMOS integrated circuits

  • Baeg, Kang-Jun;Kim, Dong-Yu;Koo, Jae-Bon;Jung, Soon-Won;You, In-Kyu;Noh, Yong-Young
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.67-70
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    • 2009
  • Printed electronics are emerging technology to realize various microelectronic devices via a cost-effective method. Here we introduce high performance inkjet printed polymer field-effect transistors and application to complementary integrated circuits with p-type and n-type conjugated polymers. The performance of devices highly depends on the selection of dielectrics, printing condition and device architecture. The device optimization and performances of various integrated circuits, e.g., complementary inverters and ring oscillators will be mainly discussed in this talk.

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고속신호처리를 위한 고주파용 Op-Amp 설계 (A High Frequency Op-amp for High Speed Signal Processing)

  • 신건순
    • 한국정보통신학회논문지
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    • 제6권1호
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    • pp.25-29
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    • 2002
  • High speed 신호처리는 통신분야, SC circuit, HDTV, ISDN 등에서 관심이 더욱 승가하고 있으며, high speed 신호처리를 위한 많은 방법들이 있다. 본 논문에서는 CMOS 공정에서 고주파 Op-amp의 실현을 의한 설계를 기술하였다. 아날로그 집적회로를 기초로 하는 high speed op-amp의 기능을 제한하는 요소 중 한가지는 유효 주파수 범위이다. 본 논문에서는 $C_{L}$ =2pF에서 단위이득 주파수가 170MHz인 향상된 대역폭적을 가지는 CMOS op-amp 구조를 계발한다. 공정은 1.2$\mu$디자인 룰을 따른다. 본 논문에서 제시한 CMOS op-amp 고주파 SC filter에서 요구하는 큰 커패시터 부하에서의 넓고 안정된 대역폭을 얻기에 매우 적합하다.

A Low-Voltage High-Performance CMOS Feedforward AGC Circuit for Wideband Wireless Receivers

  • Alegre, Juan Pablo;Calvo, Belen;Celma, Santiago
    • ETRI Journal
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    • 제30권5호
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    • pp.729-734
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    • 2008
  • Wireless communication systems, such as WLAN or Bluetooth receivers, employ preamble data to estimate the channel characteristics, introducing stringent settling-time constraints. This makes the use of traditional closed-loop feedback automatic gain control (AGC) circuits impractical for these applications. In this paper, a compact feedforward AGC circuit is proposed to obtain a fast-settling response. The AGC has been implemented in a 0.35 ${\mu}m$ standard CMOS technology. Supplied at 1.8 V, it operates with a power consumption of 1.6 mW at frequencies as high as 100 MHz, while its gain ranges from 0 dB to 21 dB in 3 dB steps through a digital word. The settling time of the circuit is below 0.25 ${\mu}s$.

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Design of a TRIAC Dimmable LED Driver Chip with a Wide Tuning Range and Two-Stage Uniform Dimming

  • Chang, Changyuan;Li, Zhen;Li, Yuanye;Hong, Chao
    • Journal of Power Electronics
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    • 제18권2호
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    • pp.640-650
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    • 2018
  • A TRIAC dimmable LED driver with a wide tuning range and a two-stage uniform dimming scheme is proposed in this paper. To solve the restricted dimming range problem caused by the limited conduction ratio of TRIAC dimmers, a conduction ratio compensation technique is introduced, which can increase the output current up to the rated output current when the TRIAC dimmer turns to the maximum conduction ratio. For further optimization, a two-stage uniform dimming diagram with a rapid dimming curve and a slow dimming curve is designed to make the LED driver regulated visually uniform in the whole adjustable range of the TRIAC dimmer. The proposed control chip is fabricated in a TSMC $0.35{\mu}m$ 5V/650V CMOS/LDMOS process, and verified on a 21V/500mA circuit prototype. The test results show that, in the 90V/60Hz~132V/60Hz ac input range, the voltage linear regulation is 2.6%, the power factor is 99.5% and the efficiency is 83%. Moreover, in the dimming mode, the dimming rate is less than 1% when the maximum dimming current is 516mA and the minimum dimming current is only about 5mA.