• Title/Summary/Keyword: CHIP

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Design of waste Sludge/Food Waste Biological Treatment Process using Closed ATAD System (밀폐형 ATAD system을 이용한 하수슬러지/음식물쓰레기 통합처리 공정 설계)

  • Kwon, Hyeok-Young;Ji, Young-Hwan;Song, Han-Jo;Kim, Seong-Jung
    • Journal of the Korea Organic Resources Recycling Association
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    • v.8 no.4
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    • pp.129-137
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    • 2000
  • In this study, biological treatment process of MWWT(Municipal wet-waste Treatment) has been developed through a moduling of the containerized closed ATAD(Auto thermal aerobic digestion) system & closed vertical dynamic acerator, which were used for food waste and cattle manure, respectively. Though biological process has several advantages such as low concentrations of heavy metals and salts, proper and stable C/N ratio and constant reaction rate against the process treating two wastes separately, it has a obstacles of salt concentration and much usage of bulking agent such as wood chip. After rapid oxidation in the boxed tower reactor for 5 days, the content of sewage sludge would be reduced 65% on around, might be mixed with the food waste that had been treated in the static closed reactor during 6 days and put in the secondary static reactor for curing. During composting process, the odor contained in the gas generated from the reactor was removed by passing it through a biofilter as well as the leachate was treated in the wastewater treatment facility. Consequently, it seemed to be possible to compost sewage sludge at mild and stable operating condition and at low cost through the biological ATAD process resulting in the production of organic compost satisfying the specifications regulated by itself.

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A Study on Polynomial Pre-Distortion Technique Using PAPR Reduction Method in the Next Generation Mobile Communication System (차세대 이동통신 시스템에 PAPR 감소기법을 적용한 다항식 사전왜곡 기법에 관한 연구)

  • Kim, Wan-Tae;Park, Ki-Sik;Cho, Sung-Joon
    • Journal of Advanced Navigation Technology
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    • v.14 no.5
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    • pp.684-690
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    • 2010
  • Recently, the NG(Next Generation) system is studied for supporting convergence of various services and multi mode of single terminal. And a demand of user for taking the various services is getting increased, for supporting these services, many systems being able to transmit a large message have been appeared. In the NG system, it has to be supporting the CDMA and WCDMA besides the tele communication systems using OFDM method with single terminal An intergrated system can be improved with adopting of SoC technique. For adopting SoC technique on the intergrated terminal, we have to solve the non linear problem of HPA(High Power Amplifier). Nonlinear characteristic of HPA distorts both amplitude and phase of transmit signal, this distortion cause deep adjacent channel interference. We adopt a polynomial pre-distortion technique for this problem. In this paper, a noble modem design for NG mobile communication service and a method using polynomial pre-distorter with PAPR technique for counterbalancing nonlinear characteristic of the HPA are proposed.

Real-time Implementation of the AMR Speech Coder Using $OakDSPCore^{\circledR}$ ($OakDSPCore^{\circledR}$를 이용한 적응형 다중 비트 (AMR) 음성 부호화기의 실시간 구현)

  • 이남일;손창용;이동원;강상원
    • The Journal of the Acoustical Society of Korea
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    • v.20 no.6
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    • pp.34-39
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    • 2001
  • An adaptive multi-rate (AMR) speech coder was adopted as a standard of W-CDMA by 3GPP and ETSI. The AMR coder is based on the CELP algorithm operating at rates ranging from 12.2 kbps down to 4.75 kbps, and it is a source controlled codec according to the channel error conditions and the traffic loading. In this paper, we implement the DSP S/W of the AMR coder using OakDSPCore. The implementation is based on the CSD17C00A chip developed by C&S Technology, and it is tested using test vectors, for the AMR speech codec, provided by ETSI for the bit exact implementation. The DSP B/W requires 20.6 MIPS for the encoder and 2.7 MIPS for the decoder. Memories required by the Am coder were 21.97 kwords, 6.64 kwords and 15.1 kwords for code, data sections and data ROM, respectively. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.

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A Low-power EEPROM design for UHF RFID tag chip (UHF RFID 태그 칩용 저전력 EEPROM설계)

  • Yi, Won-Jae;Lee, Jae-Hyung;Park, Kyung-Hwan;Lee, Jung-Hwan;Lim, Gyu-Ho;Kang, Hyung-Geun;Ko, Bong-Jin;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.3
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    • pp.486-495
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    • 2006
  • In this paper, a low-power 1Kb synchronous EEPROM is designed with flash cells for passive UHF RFID tag chips. To make a low-power EEPROM, four techniques are newly proposed. Firstly, dual power supply voltages VDD(1.5V) and VDDP(2.5V), are used. Secondly, CKE signal is used to remove switching current due to clocking of synchronous circuits. Thirdly, a low-speed but low-power sensing scheme using clocked inverters is used instead of the conventional current sensing method. Lastly, the low-voltage, VDD for the reference voltage generator is supplied by using the Voltage-up converter in write cycle. An EEPROM is fabricated with the $0.25{\mu}m$ EEPROM process. Simulation results show that power dissipations are $4.25{\mu}W$ in the read cycle and $25{\mu}W$ in the write cycle, respectively. The layout area is $646.3\times657.68{\mu}m^2$.

Evaluation of Weighted Correlator for Multipath Mitigation in GPS Receiver (GPS수신기의 다중경로 오차 제거를 위한 가중 상관기의 성능평가)

  • Shin, Mi-Young;Jang, Han-Jin;Suh, Sang-Hyun;Park, Chan-Sik;Hwang, Dong-Hwan;Lee, Sang-Jeong
    • Journal of Navigation and Port Research
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    • v.31 no.5 s.121
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    • pp.409-414
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    • 2007
  • The effect of multipath is especially serious in urban area and sea surface where buildings and water reflect GPS signal. Multipath brings about the performance degradation on many GPS application because the presence of multipath causes the diminution of pseudorange measurement accuracy in turn position accuracy. In this paper, a multipath mitigation named weighted correlation method is implemented on software GPS receiver, in which the asymmetric correlation function is compensated by modifying the late correlation value. Asymmetry compensation is obtained as weighted sum of two correlators which have different early-late chip spaces. This structure is adopted to lessen the computation load lower keeping up performance similar to that. The performance of implemented multipath mitigation technique is evaluated using GPS signal and multipath signal generated by GPS signal generator and software GPS receiver. The test results show that the weighted correlation method gives hefter performance than the standard correlator and the narrow correlator.

A Study on the Development of SSB Modem (디지털 SSB 모뎀 개발에 관한 연구)

  • Jin, Heung-Du;Choi, Jo-Cheon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2007.10a
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    • pp.693-697
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    • 2007
  • The SSB modem performs the modulation process which converts the digital voltage level to the audible frequency band signal and the demodulation process which converts reversely the audible frequency signal to the digital voltage level. The modulator and the demodulator are implemented with a single DSP chip. Because of the SSB specific character, the distortion occurs when the frequency is changed. This distortion has no effect on voice communication, but it has an significant effect on data communication. In other words, it is impossible to send data stream with adjacent 2 periods. Therefore, in case of using 2-tone FSK, it is needed to send at least 3 periods to transmit 1 bit. Therefore we implemented the modem using modified phase-delay shift keying to transmit 1 tone signal for high speed transmission. In the 1200[bps] mode, it generates 0, $187{\mu}s$ delay time at 1.3kHz symbol frequency, and in the 2400[bps] mode, 0, $70{\mu}s$, $130{\mu}s$, $200{\mu}s$ delay time at 1.5kHz symbol frequency. Finally, in the maximum 3600[bps] mode, it generates 0, $100{\mu}s$, $160{\mu}s$, $250{\mu}s$ delay time at 2.0kHz symbol frequency. The measured results of the implemented SSB modem shows a good transfer functional characteristic by spectrum analyzer, almost same bandwidth in pass band and 20dB higher SNR comparing the German PACTOR and American CLOVER and in the experimental transmitting test, we verified the transmitted data is received correctly in platform.

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The Effects of Metal Plate loaded on TLD chip in 6 MV Photon and 6 MeV Electron Beams (6 MV 광자선과 6 MeV 전자선 하에서 TLD 기판 위에 얹힌 금속 박막의 효과)

  • Kim, Sookil;Byungnim Min
    • Progress in Medical Physics
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    • v.10 no.1
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    • pp.41-46
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    • 1999
  • There is necessity for making a smaller and more sensitive detector in small field sizes. This report assesses the suitability of metal-loaded thermoluminescent dosimeters for this purpose. Measurements were performed in the 6 MV photon and 6 MeV electron beams of a medical linear accelerator with LiF thermoluminescence dosimeters (TLD-100) embedded in solid water phantom. TLD-100 chips(surface area 3.2 $\times$ 3.2 $\textrm{mm}^2$) loaded with a metal plate(Tin or gold respectively) were used to enhance dose readings to TLD-100. Surface dose was measured for field size 10 $\times$ 10 $\textrm{cm}^2$ and 100 em SSD. Measurements have been made of the enhanced signal intensity and good linearity for absorbed dose with each metal. Using a 1 mm each metal on TLD-l00 in the beam increased the surface dose to 14% and 56% respectively for 6MV photon. In the case of 6 MeV electron, gold plate enhanced the TL response to 13%, but there is no difference for tin plate. The specific dose response of TLD-100 with thin metal plate increases with electron concentration of metal film, this is most likely due to increased electron scattered from the additional material with electron density higher than TLD-100. This emphasizes the role of TL dosimeters with metal as amplified dosimeters for therapeutic high energy x-ray beams. Due to the enhanced dose reading of TLD-100 with metal plate, it could be possible to develop smaller TL dosimeter with high sensitivity.

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Design and Implementation of the Channel Adaptive Broadband MODEM (채널 적응형 광대역 모뎀 설계 및 구현)

  • Chang, Dae-Ig;Kim, Nae-Soo
    • The KIPS Transactions:PartC
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    • v.11C no.1
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    • pp.141-148
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    • 2004
  • Recently, the demand of broadband communications such as high-speed internet, HDTV, 3D-HDTV and ATM backbone network has been increased drastically. For transmitting the broad-bandwidth data using wireless network, it is needed to use ka-band frequency. However, the use of this ka-band frequency is seriously affected to the received data performance by rain fading and atmospheric propagation loss at the Ka-band satellite communication link. So, we need adaptive MODEM to endure the degraded performance by channel environment. In this paper, we will present the structure and design of the 155Mbps adaptive Modem adaptively compensated against channel environment. In order to compensate the rain attenuation over the ka-band wireless channel link, the adaptive coding schemes with variable coding rates and the multiple modulation schemes such as trellis coded 8-PSK, QPSK, and BPSK are adopted. And the blind demodulation scheme is proposed to demodulate without Information of modulation mode at the multi-mode demodulator, and the fast phase ambiguity resolving scheme is proposed. The design and simulation results of adaptive Modem by SPW model are provided. This 155Mbps adaptive MODEM was designed and implemented by single ASIC chip with the $0.25\mu{m}$ CMOS standard cell technology and 950 thousand gates.

Tmr-Tree : An Efficient Spatial Index Technique in Main Memory Databases (Tmr-트리 : 주기억 데이터베이스에서 효율적인 공간 색인 기법)

  • Yun Suk-Woo;Kim Kyung-Chang
    • The KIPS Transactions:PartD
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    • v.12D no.4 s.100
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    • pp.543-552
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    • 2005
  • As random access memory chip gets cheaper, it becomes affordable to realize main memory-based database systems. The disk-based spatial indexing techniques, however, cannot direct apply to main memory databases, because the main purpose of disk-based techniques is to reduce the number of disk accesses. In main memory-based indexing techniques, the node access time is much faster than that in disk-based indexing techniques, because all index nodes reside in a main memory. Unlike disk-based index techniques, main memory-based spatial indexing techniques must reduce key comparing time as well as node access time. In this paper, we propose an efficient spatial index structure for main memory-based databases, called Tmr-tree. Tmr-tree integrates the characteristics of R-tree and T-tree. Therefore, Nodes of Tmr-tree consist of several entries for data objects, main memory pointers to left and right child, and three additional fields. First is a MBR of a self node, which tightly encloses all data MBRs (Minimum Bounding Rectangles) in a current node, and second and third are MBRs of left and right sub-tree, respectively. Because Tmr-tree needs not to visit all leaf nodes, in terms of search time, proposed Tmr-tree outperforms R-tree in our experiments. As node size is increased, search time is drastically decreased followed by a gradual increase. However, in terms of insertion time, the performance of Tmr-tree was slightly lower than R-tree.

Compact Field Remapping for Dynamically Allocated Structures (동적으로 할당된 구조체를 위한 압축된 필드 재배치)

  • Kim, Jeong-Eun;Han, Hwan-Soo
    • Journal of KIISE:Software and Applications
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    • v.32 no.10
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    • pp.1003-1012
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    • 2005
  • The most significant difference of embedded systems from general purpose systems is that embedded systems are allowed to use only limited resources including battery and memory. Especially, the number of applications increases which deal with multimedia data. In those systems with high data computations, the delay of memory access is one of the major bottlenecks hurting the system performance. As a result, many researchers have investigated various techniques to reduce the memory access cost. Most programs generally have locality in memory references. Temporal locality of references means that a resource accessed at one point will be used again in the near future. Spatial locality of references is that likelihood of using a resource gets higher if resources near it were just accessed. The latest embedded processors usually adapt cache memory to exploit these two types of localities. Processors access faster cache memory than off-chip memory, reducing the latency. In this paper we will propose the enhanced dynamic allocation technique for structure-type data in order to eliminate unused memory space and to reduce both the cache miss rate and the application execution time. The proposed approach aggregates fields from multiple records dynamically allocated and consecutively remaps them on the memory space. Experiments on Olden benchmarks show $13.9\%$ L1 cache miss rate drop and $15.9\%$ L2 cache miss drop on average, compared to the previously proposed techniques. We also find execution time reduced by $10.9\%$ on average, compared to the previous work.