• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.697-705
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• 2014

A single chip Programmable AC to DC Power Converter, consisting of wide band gap SiC MOSFET and SiC diodes, has been proposed which converts high frequency ac voltage to a conditioned dc output voltage at user defined given power level. The converter has high conversion efficiency because of negligible reverse recovery current in SiC diode and SiC MOSFET. High frequency operation reduces the need of bigger size inductor. Lead inductors are enough to maintain current continuity. A complete electrical analysis, die area estimation and thermal analysis of the converter has been presented. It has been found that settling time and peak overshoot voltage across the device has reduced significantly when SiC devices are used with respect to Si devices. Reduction in peak overshoot also increases the converter efficiency. The total package substrate dimension of the converter circuit is only $5mm{\times}5mm$. Thermal analysis performed in the paper shows that these devices would be very useful for use as miniaturized power converters for load currents of up to 5-7 amp, keeping the package thermal conductivity limitation in mind. The converter is ideal for voltage requirements for sub-5 V level power supplies for high temperatures and space electronics systems.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.8
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• pp.10-21
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• 1999

This paper describes a 12bit CMOS current cell matrix D/A converter which shows a conversion rate of 65MHz and a power supply of 3.3V. Designed D/A converter utilizes current cell matrix structure with good monotonicity characteristic and fast settling time, and it is implemented by using the tree structure bias circuit, the symmetrical routing method with ground line and the cascode current switch to reduce the errors of the conventional D/A converter caused by a threshold voltage mismatch of current cells and a voltage drop of the ground line. The designed D/A converter was implemented with a $0.6{\mu}m$ CMOS n-well technology. The measured data shows a settling time of 20ns, a conversion rate of 50 MHz and a power dissipation of 35.6mW with a single power supply of 3.3V. The experimental SNR, DNL, and INL of the D/A converter is measured to be 55dB, ${\pm}0.5LSB$, and ${\pm}2LSB$, respectively.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.6
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• pp.28-36
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• 1997

In this work, a highly linear video-speed CMOS current-mode digital-to-analog converter (DAC) is proposed. A newswitching scheme for the current cell matrix of the DAC simultaneously reduces graded and symmetrical errors to improve integral nonlinearities (INL). The proposed DAC is designed to operate at any supply voltage between 3V and 5V, and minimizes the glitch energy of analog outputs with degliching circuits developed in this work. The prototype dAC was implemented in a LG 0.8um n-well single-poly double-metal CMOS technology. Experimental results show that the differential and integral nonlinearities are less than .+-. LSB and .+-.0.8LSB respectively. The DAC dissipates 75mW at a 3V single power supply and occupies a chip area of 2.4 mm * 2.9mm.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.43 no.5 s.311
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• pp.28-35
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• 2006

This paper presents a new 3.3-1 V synchronous buck DC/DC converter that employs CMOS operational transconductance amplifiers (OTAs) as circuit-building blocks. An error amplifier OTA in a PWM circuit is compensated for to improve temperature stability. The temperature coefficient of the transconductance gain of the compensated OTA is less than $150\;ppm/^{\circ}C\;over\;0-100^{\circ}C$. The HSPICE simulation results of the $0.3{\mu}m$ standard CMOS technology show that the efficiency of the proposed converter is as high as 80% in the load current range of 40-125 mA. These results show that the proposed converter is adequate for use in battery-operated systems.

• Journal of IKEEE
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• v.24 no.4
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• pp.1058-1063
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• 2020

This paper proposes a 12-bit SAR A/D(Successive Approximation Register Analog-to-Digital) converter that operates at low power for bio-signal and sensor signal processing. The conventional SAR A/D converter utilized the reduction of the dynamic current, which resulted in reducing total power consumption. In order to solve the limitation of the sampling time due to charging/discharging of the capacitor for reducing dynamic current, the different sampling time on the C-DAC bit switch operation was applied to reduce the dynamic current. In addition, lowering the supply voltage of the digital block to 0.6V led to 70% reduction of the total power consumption of the proposed ADC. The proposed SAR A/D was implemented with CMOS 65nm process 1-poly 6-metal, operates with a supply voltage of 1.2V. The simulation results demonstrate that ENOB, DNL/INL, power consumption and FoM are 10.4 bits, ±0.5LSB./±1.2LSB, 31.2uW and 2.8fJ/step, respectively.

• Journal of Power Electronics
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• v.9 no.4
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• pp.604-611
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• 2009

A dP/dV feedback-controlled MPPT (Maximum Power Point Tracking) method for photovoltaic power systems using II-SEPIC (Isolated Inverse-SEPIC; Single Ended Primary Inductance Converter) is presented and a current-mode dP/dV feedback-controlled MPPT method is devised to apply for the PV power converter system. A control strategy for the current-mode dP/dV feedback control system is developed in this paper and the proposed MPPT shows relatively satisfactory dynamics against rapidly changing insolation conditions. In order to verify the validity and effectiveness of the proposed method, simulations and experiments of the PV power system using II-SEPlC converter are performed. These simulation and experiment results show that the proposed method enables the PV power system to extract maximum power from the photovoltaic module against the solar insolation variation.

• Proceedings of the KIEE Conference
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• 2002.07d
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• pp.2577-2579
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• 2002

In this paper, we describe a CMOS DC-DC converter with a variable output voltage(8-12V @100mA) for a portable battery-operated system applications. The proposed DC-DC converter is used along with a Pulse-Frequency Modulation (PFM) method and consists of a reference circuit, a feedback resistor, a controller, and an internal oscillator. The integrated DC-DC converter with two external passive components(L.C) has been designed and fabricated on a 0.6${\mu}m$ 2-poly, 3-metal CMOS process and could be applied to the Personal Digital Assistants(PDA), Cellular Phone, Laptop Computer, etc.

• Journal of Power Electronics
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• v.5 no.2
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• pp.120-128
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• 2005

This paper deals with the analysis of switched reluctance motor drives for different drive circuit topologies used in automobile. So we attempt to improve the weaknesses associated with the asymmetric bridge converter in the limited internal environment of automotive application. Two kinds of c-dump converters are tested in terms of dump capacitor voltage, speed response according to the variation of advance angle and efficiency for the radiator cooling-fan drive of an automobile. They enable more economical and efficient converter topology for automobile industries. This paper describes the performance characteristics of 12V-250W-3000rpm SRM drives for automotive application. Computer simulation and experiment results are then presented to verify the performance of the two kinds of c-dump converters.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.405-406
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• 2016

A bidirectional secondary LLC resonant converter with auxiliary switches and an additional inductor is proposed to achieve the high gain characteristics of LLC resonant convertors. Auxiliary switches, an additional inductor and a resonant capacitor are connected in the high voltage secondary side of the proposed converter. The ac analysis and operating characteristics of bidirectional secondary LLC resonant converter are investigated. A 1kW prototype bidirectional secondary LLC resonant converter connected to the $400V_{DC}$ buses is designed and tested to confirm the validity and applicability of the proposed converter.

• Proceedings of the KIEE Conference
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• 2002.07b
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• pp.980-982
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• 2002

In this paper, we report the experimental results of the Forward-flyback DC-DC converter with current doubler and synchronous rectifier. The experimental converter, that has a output voltage 1.8V, output current 25A, maximum power of 45W, switching frequency of 290kHz and input voltage range of 36-75V, has been successfully implemented. As a result, in the entire voltage range the measured full load efficiency was above 82%, and the output voltage was regulated at 1.8V within ${\pm}$3% tolerance.