Browse > Article
http://dx.doi.org/10.7471/ikeee.2020.24.4.1058

Design of a 12-bit, 10-Msps SAR A/D Converter with different sampling time applied to the bit-switches within C-DAC  

Shim, Minsoo (Dept. of Electronics Engineering, inha University)
Yoon, Kwangsub (Dept. of Electronics Engineering, inha University)
Lee, Jonghwan (Dept. of System Semiconductor Engineering, sangmyung University)
Publication Information
Journal of IKEEE / v.24, no.4, 2020 , pp. 1058-1063 More about this Journal
Abstract
This paper proposes a 12-bit SAR A/D(Successive Approximation Register Analog-to-Digital) converter that operates at low power for bio-signal and sensor signal processing. The conventional SAR A/D converter utilized the reduction of the dynamic current, which resulted in reducing total power consumption. In order to solve the limitation of the sampling time due to charging/discharging of the capacitor for reducing dynamic current, the different sampling time on the C-DAC bit switch operation was applied to reduce the dynamic current. In addition, lowering the supply voltage of the digital block to 0.6V led to 70% reduction of the total power consumption of the proposed ADC. The proposed SAR A/D was implemented with CMOS 65nm process 1-poly 6-metal, operates with a supply voltage of 1.2V. The simulation results demonstrate that ENOB, DNL/INL, power consumption and FoM are 10.4 bits, ±0.5LSB./±1.2LSB, 31.2uW and 2.8fJ/step, respectively.
Keywords
CMOS; SAR; A/D Converter; Low Power; Bio-signal;
Citations & Related Records
연도 인용수 순위
  • Reference
1 Wan Kim, Hyeok-Ki Hong, Yi-Ju Roh, Hyun-Wook Kang, Sun-Il Hwang, Dong-Shin Jo, Dong0Jin Chang, Min-Jae Seo, and Seung-Tak Ryu, "A 0.a6V 12b 10MS/s Low Noise Asynchronous SAR-Assisted Time-interleaved SAR (SATI-SAR) ADC," IEEE J. Solid-State Circuits, Vol.51, No.8, pp. 826-1839, 2016. DOI: 10.1109/JSSC.2016.2563780   DOI
2 Yung-Hui Chung, and Ya-Mien Hsu, "A 12-Bit 100-MS/s Subrange SAR ADC With a Foreground Offset Tracking Calibration Scheme," IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-II: EXPRESS BRIEFS, VOL.66, NO.7, pp.1094-1098, 2019. DOI: 10.1109/TCSII.2018.2876874   DOI
3 DEEKSHA VERMA, KHURAM SHEHZAD, DANIAL KHAN, QURAT UL AIN, Sung-Jin KIM, Dong-Soo LEE, YOUNGGUN PU, Min-jae LEE, Keum-Cheol HWANG, YOUNGOO YANG and Kang-Yoon LEE, "A 1GS/s 10b 18.9mW Time-interleaved SAR ADC With Backgroung Timing Skew Calibration," IEEE J. Digital Object Identifier, Vol.8, No. 12, pp.85869-85879, 2020.
4 Kyojin Dabid Choo, Li Xu Yejoong Kim, Ji-Hwan Seol, Xiao Wu, Dennis Sylvester, and David Blaauw, "Eneragy Efficient Motion-Triggered IoT CMOS Image Sensor With Capacitor Array-Assisted Charge-Injection SAR ADC," IEEE J. Solid-state circuits, VOL. 54, No.11, pp.2921-2931, 2019. DOI: 10.1109/JSSC.2019.2939664   DOI
5 Dezhi Xing, Yan Zhu, Chi-Hang Chan, Franco Maloberti, Seng-Pan U, and Rui Paulo Martins, "Design of a High Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique," IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-I: REGULAR PAPERS, Vol.66, No.2, pp.489-501, 2019. DOI: 10.1109/TCSI.2018.2866958   DOI
6 Sung-Hyuk Lee, Anantha P. Chandrakasan, and Hae-Seung Lee, "A 1GS/s 10b 18.9mW Time-interleaved SAR ADC With Backgroung Timing Skew Calibration," IEEE J. Solid-state circuits, Vol.49, No.12, pp.2846-2856, 2014. DOI: 10.1109/JSSC.2014.2362851   DOI