• 대한전자공학회논문지SD
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• 제41권8호
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• pp.31-36
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• 2004

본 논문에서는 UV 처리와 BOE 세정을 이용하여 레이저 어닐링 전의 실리콘 표면에 자연 산화막을 제거하여 다결정 실리콘 TFT의 신뢰성을 향상시키는 방법을 제안하였다. 전처리 공정이 다결정 실리콘의 표면 거칠기에 미치는 영향을 AFM으로 측정하였으며, 다결정 실리콘 TFT의 전기적 특성인 스위칭 특성과 항복특성을 대형 유리기판의 위치와 전처리의 유무에 대해서 조사하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.363-363
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• 2010

After oxide wet etch with BOE(Buffered Oxide Etchant), triangle type defect maps were inspected and SEM image showed them unetch of oxide layer. As decreasing design rule, oxide unetch has become a crucial issue and has affected the yield and quality.

• 한국전기전자재료학회논문지
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• 제34권4호
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• pp.242-245
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• 2021

In this work, we fabricated oxide on an n-type silicon substrate through local anodic oxidation (LAO) using atomic force microscopy (AFM). The resulting oxide thickness was measured and its correlation with load force, scan speed and applied voltage was analyzed. The surface oxide layer was stripped using a buffered oxide etch. Ohmic contacts were created by applying silver paste on the silicon substrate back face. LAO was performed at approximately 70% humidity. The oxide thickness increased with increasing the load force, the voltage, and reducing the scan speed. We confirmed that LAO/AFM can be used to create both lateral and, to some extent, vertical shapes and patterns, as previously shown in the literature.

• 센서학회지
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• 제8권5호
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• pp.414-420
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• 1999

희생층을 제거하는 기술은 표면 마이크로머시닝 공정의 핵심기술중 하나이다. 그러나 희생층을 제거하는데 널리 쓰이는 BHF 용액을 포함한 HF 수용액은 희생층 제거시 금속층으로 쓰이는 알루미늄도 같이 식각하는 것으로 알려져 있다. 기존의 문헌에서 $NH_4F$:HF:glycerine=4:1:2의 비를 갖는 혼합 용액이 알루미늄과 PSG 간의 식각 선택비가 최적조건으로 제시되었지만 이 희생층 식각액 또한 상당한 알루미능 식각률을 가지고 있다. 본 논문에서는 HF, $NH_4F$, glycerine의 농도를 광범위하게 변화시켜 희생층 제거에 필요한 최적 혼합비를 개발하였으며 그 결과 $NH_4F$:HF:glycerine=2:1:4의 혼합비에서 약 7,700정도의 PSG와 Al의 식각 선택비를 가져 기존의 최적 식각 선택비보다 차수가 약 6배정도 향상된 희생층 식각액을 얻을 수 있었다. 이 조건에서 PSG의 식각률은 희생층 제거시 충분히 빠른 값인 약 $2.1\;{\mu}m/min$을 나타내었다. 이러한 개발된 희생층 식각액은 표면 마이크로머시닝 공정에서 알루미늄 금속 공정의 추가를 용이하게 한다.

• 대한금속재료학회지
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• 제47권11호
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• pp.748-753
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• 2009

The surface morphology and the surface roughness of n-type SiC induced by wet-treatment using 45% KOH and buffered oxide etchant (BOE-1HF : $6H_2O$) were investigated by atomic force microscopy (AFM). While Si-face of SiC could be etched by alkali solutions such as KOH, acidic solutions such as BOE were hardly able to etch SiC. When the rough SiC samples were used, the surface roughness of etched sample was decreased after wet-treatment regardless of etchant, due to the planarization the of surface by widening of scratches formed by mechanical polishing. It was observed that the initial etching was affected by the energetically unstable sites, such as dangling bond and steps. However, when a relatively smooth sample was used, the surface roughness was rapidly increased after treatment at $180^{\circ}C$ for 1 hr and at room temperature for 4 hr by using KOH solution, resulting from the nano-sized structures such as pores and bumps. This indicates that porous SiC surface can be achieved by using purely chemical treatment.

• Journal of Welding and Joining
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• 제30권3호
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• pp.26-31
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• 2012

Three-dimensional integrated circuit (3D IC) technology has become increasingly important due to the demand for high system performance and functionality. We have evaluated the effect of Buffered oxide etch (BOE) on the interfacial bonding strength of Cu-Cu pattern direct bonding. X-ray photoelectron spectroscopy (XPS) analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE 2min. Two 8-inch Cu pattern wafers were bonded at $400^{\circ}C$ via the thermo-compression method. The interfacial adhesion energy of Cu-Cu bonding was quantitatively measured by the four-point bending method. After BOE 2min wet etching, the measured interfacial adhesion energies of pattern density for 0.06, 0.09, and 0.23 were $4.52J/m^2$, $5.06J/m^2$ and $3.42J/m^2$, respectively, which were lower than $5J/m^2$. Therefore, the effective removal of Cu surface oxide is critical to have reliable bonding quality of Cu pattern direct bonds.

• 한국재료학회지
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• 제24권12호
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• pp.682-688
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• 2014

Physical and chemical changes in a polished wafer and in $2.5{\mu}m$ & $4{\mu}m$ epitaxially grown Si layer wafers (Epilayer wafer) after surface treatment were investigated. We characterized the influence of surface treatment on wafer properties such as surface roughness and the chemical composition and bonds. After each surface treatment, the physical change of the wafer surface was evaluated by atomic force microscopy to confirm the surface morphology and roughness. In addition, chemical changes in the wafer surface were studied by X-ray photoemission spectroscopy measurement. Changes in the chemical composition were confirmed before and after the surface treatment. By combined analysis of the physical and chemical changes, we found that diluted hydrofluoric acid treatment is more effective than buffered oxide etching for $SiO_2$ removal in both polished and Epi-Layer wafers; however, the etch rate and the surface roughness in the given treatment are different among the polished $2.5{\mu}m$ and $4{\mu}m$ Epi-layer wafers in spite of the identical bulk structural properties of these wafers. This study therefore suggests that independent surface treatment optimization is required for each wafer type, $2.5{\mu}m$ and $4{\mu}m$, due to the meaningful differences in the initial surface chemical and physical properties.

• 마이크로전자및패키징학회지
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• 제19권1호
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• pp.39-45
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• 2012

Cu-Cu 패턴의 직접접합 공정을 위하여 Buffered Oxide Etch(BOE) 및 Hydrofluoric acid(HF)의 습식 조건에 따른 Cu와 $SiO_2$의 식각 특성에 대한 평가를 수행하였다. 접촉식 3차원측정기(3D-Profiler)를 이용하여 Cu와 $SiO_2$의 단차 및 Chemical Mechanical Polishing(CMP)에 의한 Cu의 dishing된 정도를 분석 하였다. 실험 결과 BOE 및 HF 습식 식각 시간이 증가함에 따라 단차가 증가 하였고, BOE가 HF보다 더 식각 속도가 빠른 것을 확인하였다. BOE 및 HF 습식 식각 후 Cu의 dishing도 식각시간 증가에 따라 감소하였다. 식각 후 산화막 유무를 알아보기 위해 Cu표면을 X-선 광전자 분광법(X-ray Photoelectron Spectroscopy, XPS)를 이용하여 분석 한 결과 HF습식 식각 후 BOE습식 식각보다 Cu표면산화막이 상대적으로 더 얇아 진 것을 확인하였다.

• 한국전기전자재료학회논문지
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• 제18권9호
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• pp.810-814
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• 2005

[ $Pb(Zr_{0.2}Ti_{0.8})O_3/SrRuO_3$ ] heteroepitaxial thin films were deposited at various temperatures on single crystal $SrTiO_3$ substrates by pulsed laser deposition and characterized for the microstructural and ferroelectric properties. The $SrTiO_3$ substartes etched by buffered oxide etch $(pH{\thickapprox}5.8)$ solution for 20s followed by the thermal annealing at $1000^{\circ}C$ for 1h showed the terrace ledges with a 0.4nm height. The $SrRuO_3$ bottom electrodes with a thickness of 52nm grown on $SrTiO_3$ single crystal also exhibit a terrace ledge similar to that of $SrTiO_3$. The PZT thin films were grown with an epitaxial relationship and showed typical P-E hysteresis loops shown at the epitaxial films. The 56nm thick-PZT films deposited at $650^{\circ}C$ exhibit a remanent polarization $(p_r)$ of $80{\mu}C/cm^2$ and a coercive field $(E_c)$ of 160kV/cm.