• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.31-36
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• 2004

we developed a technique to manufacture more reliable polycrystalline silicon TFT-LCDs using UV cleaning and buffered oxide etch(BOE) cleaning which remove the native oxide of the silicon surface before laser annealing. To investigate the effects of pre-treatments on the surface roughness of polycrystalline silicon, we measured atomic force microscopy(AFM). Also the electrical characteristics of polysilicon TFTs, breakdown characteristic and switching Performance, were tested for various pre-treatment conditions and several locations in large glass substrate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.363-363
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• 2010

After oxide wet etch with BOE(Buffered Oxide Etchant), triangle type defect maps were inspected and SEM image showed them unetch of oxide layer. As decreasing design rule, oxide unetch has become a crucial issue and has affected the yield and quality.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.34 no.4
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• pp.242-245
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• 2021

In this work, we fabricated oxide on an n-type silicon substrate through local anodic oxidation (LAO) using atomic force microscopy (AFM). The resulting oxide thickness was measured and its correlation with load force, scan speed and applied voltage was analyzed. The surface oxide layer was stripped using a buffered oxide etch. Ohmic contacts were created by applying silver paste on the silicon substrate back face. LAO was performed at approximately 70% humidity. The oxide thickness increased with increasing the load force, the voltage, and reducing the scan speed. We confirmed that LAO/AFM can be used to create both lateral and, to some extent, vertical shapes and patterns, as previously shown in the literature.

• Journal of Sensor Science and Technology
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• v.8 no.5
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• pp.414-420
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• 1999

The oxide sacrificial layer technology is one of the key technologies in surface micromachining. However, the commonly used aqueous HF solutions, including the $NH_4F$ buffered HF solutions (BHF), are known to attack the Al metal layers during the oxide sacrificial etch. A mixed $NH_4F$/HF/glycerine aqueous solution of 4:1:2 ratio is known to have the best etch selectivity between oxide and AI, but even this sacrificial etchant has a significant etch rate for AI. This paper reports an extensive experimental study on various concentration ratios for HF, $NH_4F$ and glycerine, and develops the optimal mixture ratio for sacrificial etching. At the $NH_4F$/HF/glycerine ratio of 2:1:4, the etch selectivity between PSG and Al improves by approximately 6 times over the previously known best selectivity, to a value of 7,700. At this condition, the measured etch rate of PSG film is approximately $2.1\;{\mu}m/min$, which is sufficiently fast. The developed sacrificial etchant allows the addition of a Al metal layer in surface micromachining, without the worry of Al layer erosion during sacrificial etch.

• Korean Journal of Metals and Materials
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• v.47 no.11
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• pp.748-753
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• 2009

The surface morphology and the surface roughness of n-type SiC induced by wet-treatment using 45% KOH and buffered oxide etchant (BOE-1HF : $6H_2O$) were investigated by atomic force microscopy (AFM). While Si-face of SiC could be etched by alkali solutions such as KOH, acidic solutions such as BOE were hardly able to etch SiC. When the rough SiC samples were used, the surface roughness of etched sample was decreased after wet-treatment regardless of etchant, due to the planarization the of surface by widening of scratches formed by mechanical polishing. It was observed that the initial etching was affected by the energetically unstable sites, such as dangling bond and steps. However, when a relatively smooth sample was used, the surface roughness was rapidly increased after treatment at $180^{\circ}C$ for 1 hr and at room temperature for 4 hr by using KOH solution, resulting from the nano-sized structures such as pores and bumps. This indicates that porous SiC surface can be achieved by using purely chemical treatment.

• Journal of Welding and Joining
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• v.30 no.3
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• pp.26-31
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• 2012

Three-dimensional integrated circuit (3D IC) technology has become increasingly important due to the demand for high system performance and functionality. We have evaluated the effect of Buffered oxide etch (BOE) on the interfacial bonding strength of Cu-Cu pattern direct bonding. X-ray photoelectron spectroscopy (XPS) analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE 2min. Two 8-inch Cu pattern wafers were bonded at $400^{\circ}C$ via the thermo-compression method. The interfacial adhesion energy of Cu-Cu bonding was quantitatively measured by the four-point bending method. After BOE 2min wet etching, the measured interfacial adhesion energies of pattern density for 0.06, 0.09, and 0.23 were $4.52J/m^2$, $5.06J/m^2$ and $3.42J/m^2$, respectively, which were lower than $5J/m^2$. Therefore, the effective removal of Cu surface oxide is critical to have reliable bonding quality of Cu pattern direct bonds.

• Korean Journal of Materials Research
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• v.24 no.12
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• pp.682-688
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• 2014

Physical and chemical changes in a polished wafer and in $2.5{\mu}m$ & $4{\mu}m$ epitaxially grown Si layer wafers (Epilayer wafer) after surface treatment were investigated. We characterized the influence of surface treatment on wafer properties such as surface roughness and the chemical composition and bonds. After each surface treatment, the physical change of the wafer surface was evaluated by atomic force microscopy to confirm the surface morphology and roughness. In addition, chemical changes in the wafer surface were studied by X-ray photoemission spectroscopy measurement. Changes in the chemical composition were confirmed before and after the surface treatment. By combined analysis of the physical and chemical changes, we found that diluted hydrofluoric acid treatment is more effective than buffered oxide etching for $SiO_2$ removal in both polished and Epi-Layer wafers; however, the etch rate and the surface roughness in the given treatment are different among the polished $2.5{\mu}m$ and $4{\mu}m$ Epi-layer wafers in spite of the identical bulk structural properties of these wafers. This study therefore suggests that independent surface treatment optimization is required for each wafer type, $2.5{\mu}m$ and $4{\mu}m$, due to the meaningful differences in the initial surface chemical and physical properties.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.1
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• pp.39-45
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• 2012

Three-dimensional integrated circuit(3D IC) technology has become increasingly important due to the demand for high system performance and functionality. In this work, BOE and HF wet etching of Cu line surfaces after CMP were conducted for Cu-Cu pattern direct bonding. Step height of Cu and $SiO_2$ as well as Cu dishing after Cu CMP were analyzed by the 3D-Profiler. Step height increased and Cu dishing decreased with increasing BOE and HF wet etching times. XPS analysis of Cu surface revealed that Cu surface oxide layer was partially removed by BOE and HF wet etching treatment. BOE treatment showed not only the effective $SiO_2$ etching but also reduced dishing and Cu surface oxide rather than HF treatment, which can be used as an meaningful process data for reliable Cu-Cu pattern bonding characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.9
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• pp.810-814
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• 2005

[ $Pb(Zr_{0.2}Ti_{0.8})O_3/SrRuO_3$ ] heteroepitaxial thin films were deposited at various temperatures on single crystal $SrTiO_3$ substrates by pulsed laser deposition and characterized for the microstructural and ferroelectric properties. The $SrTiO_3$ substartes etched by buffered oxide etch $(pH{\thickapprox}5.8)$ solution for 20s followed by the thermal annealing at $1000^{\circ}C$ for 1h showed the terrace ledges with a 0.4nm height. The $SrRuO_3$ bottom electrodes with a thickness of 52nm grown on $SrTiO_3$ single crystal also exhibit a terrace ledge similar to that of $SrTiO_3$. The PZT thin films were grown with an epitaxial relationship and showed typical P-E hysteresis loops shown at the epitaxial films. The 56nm thick-PZT films deposited at $650^{\circ}C$ exhibit a remanent polarization $(p_r)$ of $80{\mu}C/cm^2$ and a coercive field $(E_c)$ of 160kV/cm.