• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.11
• /
• pp.89-94
• /
• 2008

In this paper, a cascade of a wideband amplifier and a high-Q bandpass filter (BPF) has been realized in a 0.18mm CMOS technology for the applications of subsampling direct-conversion receivers. The wideband amplifier is designed to obtain the -3dB bandwidth of 5.4GHz, and the high-Q BPF is designed to select a 2.4GHz RF signal for the Bluetooth specifications. The measured results demonstrate 18.8dB power gain at 2.34GHz with 31MHz bandwidth, corresponding to the quality factor of 75. Also, it shows the noise figure (NF) of 8.6dB, and the broadband input matching (S11) of less than -12dB within the bandwidth. The whole chip dissipates 64.8mW from a single 1.8V supply and occupies the area of $1.0{\times}1.0mm2$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.16 no.10 s.101
• /
• pp.1050-1058
• /
• 2005

This paper presents how to design and implement a very compact, cost effective and broad band receiver module for IEEE 802.16 FWA(Fixed Wireless Access) in the 40 GHz band. The presented receiver module is fabricated in a multi-layer LTCC(Low Temperature Cofired Ceramic) technology with cavity process to achieve excellent electrical performances. The receiver consists of two MMICs, low noise amplifier and sub-harmonic mixer, an embedded image rejection filter and an IF amplifier. CB-CPW, stripline, several bond wires and various transitions to connect each element are optimally designed to keep transmission loss low and module compact in size. The LTCC is composed of 6 layers of Dupont DP-943 with relative permittivity of 7.1. The thickness of each layer is 100 um. The implemented module is $20{\times}7.5{\times}1.5\;mm^3$ in size and shows an overall noise figure of 4.8 dB, an overall down conversion gain of 19.83 dB, input P1 dB of -22.8 dBm and image rejection value of 36.6 dBc. Furthermore, experimental results demonstrate that the receiver module is suitable for detection of Digital TV signal transmitted after up-conversion of $560\~590\;MHz$ band to 40 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.19 no.1
• /
• pp.23-32
• /
• 2008

In the VHF range, active antennas are widely used for wideband applications due to their small size. Active antenna consists of antenna elements and amplifiers, which are directly connected to each other. Gain and noise-figure characteristics are very important for good sensitivity performance, because it is located at the front end of a receiving system. In this study, we developed an active dipole antenna with 5:1 bandwidth(100${\sim}$500 MHz), which consists of a dipole antenna and a P-HEMT amplifier. To obtain required performances, the antenna and the amplifier should be designed simultaneously. In order for that, we introduced an equivalent port concept to model the 1-port dipole antenna as an equivalent 2-port system. Using the proposed equivalent port, the performance of the active dipole antenna was simulated by the ADS. In order to measure the gain and noise-figure characteristics of the antenna, we utilized the same concept of the two-port equivalent impedance model. The measurement results for typical gain, NF and VSWR in the required frequency band were 8dBi, 9dB and 1.7:1, respectively. The radiation patterns at the principal planes were same as the typical radiation pattern of a dipole antenna. By comparing the simulation results with measured ones, it is confirmed that the proposed methods works well.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.15 no.5
• /
• pp.1125-1134
• /
• 2011

In this paper a wideband frequency synthesizer is designed for DTV tuners using a $0.18{\mu}m$ CMOS process. It satisfies the DTV frequency band(48~1675MHz). A scheme is proposed to cover the full band using only one VCO and reliable broadband characteristics are achieved by reducing the variations of VCO gains and frequency steps. The simulation results show that the designed VCO has frequency range of 1.85~4.22GHz, phase noise at 4.22GHz of -89.7dBc/Hz@100kHz, gains of 62.4~95.8MHz/V(${\pm}21.0%$) and frequency steps of 22.9~47.9MHz(${\pm}35.3%$). The designed VCO has a phase noise of -89.75dBc/Hz at 100kHz offset. The designed synthesizer has a lock time less than $0.15{\mu}s$. The measured VCO tuning range is 2.05~3.4GHz. The frequency range is shifted down but still satisfy the target range owing to the design for enough margin. The designed circuit consumes 23~27mA from a 1.8V supply, and the chip size including PADs is $2.0mm{\times}1.5mm$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.19 no.11
• /
• pp.1193-1203
• /
• 2008

An active antenna(AA) can have wider bandwidth and more gain with small antenna size than those of passive antennas. However, AA inherently generates thermal noise and spurious signals from an active device. Moreover, the spurious performance of AA is very important in a highly sensitive receiving system since it is located at the front end of the receiving system. In this study, we developed an AA with $100{\sim}500\;MHz$, having the output P1dB higher than 3 dBm and little spurious signals in real environments. To achieve such performance, we designed an AA with 3-stage amplifier using CD(common drain) FET and 2 BJTs. Its electrical performances were simulated using ADS. The measurement results for typical gain, NF, OIP3, VSWR and P1dB in the required frequency band were 9.7 dBi, 10 dB, 14 dBm, 1.7:1 and 3 dBm respectively. They are in good agreement with simulation results. The unwanted spectrum level of the proposed AA is $10{\sim}30\;dB$ lower than that of the antenna with CS(common source) FET configuration at a west suburban area of Seoul, which shows that the proposed AA can be applicable to a highly sensitive receiving system for detecting unknown weak signals mixed with broadcasting and civilian communication signals.

• Journal of IKEEE
• /
• v.14 no.1
• /
• pp.65-74
• /
• 2010

The Digital TV(DTV) standard has ushered in a new era in TV broadcasting and raised a great demand for DTV tuners. There are many challenges in designing a DTV tuner, of which the most difficult part is the frequency synthesizer. This paper presents the design of a frequency synthesizer for DTV Tuners in a $0.18{\mu}m$ CMOS process. It satisfies the DTV(ATSC) frequency band(54~806MHz). A scheme is proposed to cover the full band using only one VCO. The VCO has been designed to operate at 1.6~3.6GHz band such that the LO pulling effect is minimized, and reliable broadband characteristics have been achieved by reducing the variations of VCO gain and frequency step. The simulation results show that the designed VCO has gains of 59~94MHz(${\pm}$17.7MHz/V,${\pm}$23%) and frequency steps of 26~42.5MHz(${\pm}$8.25MHz/V,${\pm}$24%), and a very wide tuning range of 76.9%. The designed frequency synthesizer has a phase noise of -106dBc/Hz at 100kHz offset, and the lock time is less than $10{\mu}$sec. It consumes 20~23mA from a 1.8V supply, and the chip size including PADs is 2.0mm${\times}$1.8mm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.24 no.10
• /
• pp.987-993
• /
• 2013

Chaos communication system has characteristics of non-periodic, non-predictability, broadband signal and easy implementation. Also, chaos communication system is sensitive to the initial value, because completely another signal is generated when initial value of chaos equation is changed subtly. By these characteristics, security of chaos communication system is generally evaluated better than other digital communication systems. However, BER(Bit Error Rate) performance is worse than other digital communication systems, because transmitter and receiver of existing chaos communication system are strongly influenced by reference signal and noise. So, studies in order to improve the BER performance of chaos communication system is continuously performed. In this paper, We will propose a new CDSK (Correlation Delay Shift Keying) receiver in order to improve the BER performance. After we compare to the performance of existing receiver and proposed receiver, BER performance of proposed receiver evaluate. A novel receiver has characteristic that BER performance is better than existing receiver. However, if existing transmitter is used, existing receiver is possible to recover information bits even though BER performance is bad. Therefore, we propose a novel CDSK transmitter in order to improve the security of proposed receiver. When information bits are transmitted by using proposed transmitter, existing receiver is impossible to recover information bits, and proposed receiver is possible to recover information bits.