• Title/Summary/Keyword: Blocking Voltage

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Heat Dissipation Analysis of 12kV Diode by the Packaging Structure (12kV급 다이오드의 패키징 구조에 따른 방열 특성 연구)

  • Kim, Nam-Kyun;Kim, Sang-Cheol;Bahng, Wook;Song, Geun-Ho;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.1092-1095
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    • 2001
  • Steady state thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin with a thickness of 25${\mu}$m. It was assumed that the generated heat which is mainly by the on-state voltage drop, 9V for 12kV diode, is dissipated by way of the conduction through diodes layers to bonding wire and of the convection at the surface of passivating resin. It was predicted by the thermal analysis that the temperature rise of a pn junction of the 12kV diode can reach at the range of 16∼34$^{\circ}C$ under the given boundary conditions. The thickness and thermal conductivity(0.3∼3W/m-K) of the passivating resin did little effect to lower thermal resistance of the diode. As the length of the bonding wire increased, which means the distance of heat conduction path became longer, the thermal resistance increased considerably. The thermal analysis results imply that the generated heat of the diode is dissipated mainly by the conduction through the route of diode-dummy wafer-bonding wire, which suggests to minimize the length of the wire for the lowest thermal resistance.

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Simulation and Fabrication Studies of Semi-superjunction Trench Power MOSFETs by RSO Process with Silicon Nitride Layer

  • Na, Kyoung Il;Kim, Sang Gi;Koo, Jin Gun;Kim, Jong Dae;Yang, Yil Suk;Lee, Jin Ho
    • ETRI Journal
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    • v.34 no.6
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    • pp.962-965
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    • 2012
  • In this letter, we propose a new RESURF stepped oxide (RSO) process to make a semi-superjunction (semi-SJ) trench double-diffused MOSFET (TDMOS). In this new process, the thick single insulation layer ($SiO_2$) of a conventional device is replaced by a multilayered insulator ($SiO_2/SiN_x/TEOS$) to improve the process and electrical properties. To compare the electrical properties of the conventional RSO TDMOS to those of the proposed TDMOS, that is, the nitride_RSO TDMOS, simulation studies are performed using a TCAD simulator. The nitride_RSO TDMOS has superior properties compared to those of the RSO TDMOS, in terms of drain current and on-resistance, owing to a high nitride permittivity. Moreover, variations in the electrical properties of the nitride_RSO TDMOS are investigated using various devices, pitch sizes, and thicknesses of the insulator. Along with an increase of the device pitch size and the thickness of the insulator, the breakdown voltage slowly improves due to a vertical field plate effect; however, the drain current and on-resistance degenerate, owing to a shrinking of the drift width. The nitride_RSO TDMOS is successfully fabricated, and the blocking voltage and specific on-resistance are 108 V and $1.1m{\Omega}cm^2$, respectively.

A New 12-Pulse Diode Rectifier System With Low kVA Components For Clean Power Utility Interface

  • ;Prasad N.Enjeti
    • The Transactions of the Korean Institute of Power Electronics
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    • v.4 no.5
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    • pp.423-432
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    • 1999
  • This paper proposes a 12­pulse diode rectifier system with low kVA components suitable for powering switch mode power supplies or ac/dc converter applications. The proposed 12-pulse system employs a polyphase transformer, a zero sequence blocking transformer (ZSBT) in the dc link, and an interphase transformer. Results produce near equal leakage inductance in series with each diode rectifier bridge ensuring equal current sharing and performance improvements, The utility input currents and the voltage across the ZSBT are analyzed the kVA rating of each component in the proposed system is computed. The 5th , 7th , 17th and 19th harmonics are eliminated in the input line currents resulting in clean input power. The dc link voltage magnitude generated by the proposed rectifier system is nearly identical to a conventional to a conventional 6-pulse system. The proposed system is suitable to retrofit applications as well as in new PWM drive systems. Simulation and experimental results from a 208V , 10kVA system are shown.

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Switching Transient Analysis and Design of a Low Inductive Laminated Bus Bar for a T-type Converter

  • Wang, Quandong;Chang, Tianqing;Li, Fangzheng;Su, Kuifeng;Zhang, Lei
    • Journal of Power Electronics
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    • v.16 no.4
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    • pp.1256-1267
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    • 2016
  • Distributed stray inductance exerts a significant influence on the turn-off voltages of power switching devices. Therefore, the design of low stray inductance bus bars has become an important part of the design of high-power converters. In this study, we first analyze the operational principle and switching transient of a T-type converter. Then, we obtain the commutation circuit, categorize the stray inductance of the circuit, and study the influence of the different types of stray inductance on the turn-off voltages of switching devices. According to the current distribution of the commutation circuit, as well as the conditions for realizing laminated bus bars, we laminate the bus bar of the converter by integrating the practical structure of a capacitor bank and a power module. As a result, the stray inductance of the bus bar is reduced, and the stray inductance in the commutation circuit of the converter is reduced to more than half. Finally, a 10 kVA experimental prototype of a T-type converter is built to verify the effectiveness of the designed laminated bus bar in restraining the turn-off voltage spike of the switching devices in the converter.

Current-Voltage-Luminance Characteristics of Organic Light-Emitting Diodes with a Variation of PVK Concentration Used as a Buffer Layer (버퍼층으로 사용한 PVK의 농도 변화에 따른 유기 발광 소자의 전압-전류-휘도 특성)

  • Kim, Sang-Keol;Hong, Jin-Woong;Kim, Tae-Wan
    • Journal of the Korean Applied Science and Technology
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    • v.19 no.1
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    • pp.68-72
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    • 2002
  • We have seen the effects of buffer layer in organic light-emitting diodes(OLEDs) using poly(N-vinylcarbazole)(PVK) depending on a concentration of PVK. Polymer PVK buffer layer was made using spin casting technique. Two device structures were fabricated; one is ITO/TPD/$Alq_{3}$/Al as a reference, and the other is ITO/PVK/TPD/$Alq_{3}$/Al to see the effects of buffer layer in organic light-emitting diodes. Current-voltage-luminance characteristics and an external quantum efficiency were measured with a variation of spin-casting rpm speeds and PVK concentration. We have obtained an improvement of external quantum efficiency by a factor of four when the PVK concentration is 0.1wt% is used. The improvement of efficiency is expected due to a function of hole-blocking of PVK in OLEDs.

Nitric Oxide Modulation of GABAergic Synaptic Transmission in Mechanically Isolated Rat Auditory Cortical Neurons

  • Lee, Jong-Ju
    • The Korean Journal of Physiology and Pharmacology
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    • v.13 no.6
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    • pp.461-467
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    • 2009
  • The auditory cortex (A1) encodes the acquired significance of sound for the perception and interpretation of sound. Nitric oxide (NO) is a gas molecule with free radical properties that functions as a transmitter molecule and can alter neural activity without direct synaptic connections. We used whole-cell recordings under voltage clamp to investigate the effect of NO on spontaneous GABAergic synaptic transmission in mechanically isolated rat auditory cortical neurons preserving functional presynaptic nerve terminals. GABAergic spontaneous inhibitory postsynaptic currents (sIPSCs) in the A1 were completely blocked by bicuculline. The NO donor, S-nitroso-N-acetylpenicillamine (SNAP), reduced the GABAergic sIPSC frequency without affecting the mean current amplitude. The SNAP-induced inhibition of sIPSC frequency was mimicked by 8-bromoguanosine cyclic 3',5'-monophosphate, a membrane permeable cyclic-GMP analogue, and blocked by 2-(4-carboxyphenyl)-4,4,5,5-tetramethylimidazoline-1-oxyl-3-oxide, a specific NO scavenger. Blockade of presynaptic $K^+$ channels by 4-aminopyridine, a $K^+$ channel blocker, increased the frequencies of GABAergic sIPSCs, but did not affect the inhibitory effects of SNAP. However, blocking of presynaptic $Ca^{2+}$ channels by $Cd^{2+}$, a general voltage-dependent $Ca^{2+}$ channel blocker, decreased the frequencies of GABAergic sIPSCs, and blocked SNAP-induced reduction of sIPSC frequency. These findings suggest that NO inhibits spontaneous GABA release by activation of cGMP-dependent signaling and inhibition of presynaptic $Ca^{2+}$ channels in the presynaptic nerve terminals of A1 neurons.

The Research on Trench Etched Field Ring with Dual Ion-Implantation for Power Devices (이중 이온주입 공정을 이용한 트렌치 필드링 설계 최적화 및 전기적 특성에 관한 연구)

  • Yang, Sung-Min;Oh, Ju-Hyun;Bae, Young-Seok;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.5
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    • pp.364-367
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    • 2010
  • The dual ion-implantation trench edge termination techniques were investigated and optimized using a two-dimensional device simulator. By trenching the field ring site which would be dual implanted, a better blocking capability can be obtained. The results show that the p-n junction with dual implanted junction field-ring can accomplish nearly 20% increase of breakdown voltage in comparison with the conventional trench field-rings. The fabrication is relatively difficult. But the trench etched field ring with dual ion-implantation is surpassed for breakdown voltage and consume same area and extensive device simulations as well as qualitative analysis confirm these conclusions.

The Fabrication and Characteristics of p-channel SONOS Charge-Trap Flash Memory (p채널 SONOS 전하트랩 플래시메모리의 제작 및 특성)

  • Kim, Byung-Cheul;Kim, Joo-Yeon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.604-607
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    • 2008
  • In this study, p-channel silicon-oxide-nitride-oxide-silicon (SONOS) transistors are fabricated and characterized as an unit cell for NAND flash memory. The SONOS transistors are fabricated by $0.13{\mu}m$ low power standard logic process technology. The thicknesses of gate insulators are $20{\AA}$ for the tunnel oxide, $14{\AA}$ for the nitride layer, and $49{\AA}$ for the blocking oxide. The fabricated SONGS transistors show low programming voltage, fast erase speed, and relatively good retention and endurance.

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Study on the Characteristic Analysis and the Design of the IGBT Structure with Trap Injection for Improved Switching Characteristics (트랩 주입의 구조적 설계에 따른 LIGBT의 전기적 특성 개선에 관한 연구)

  • Gang, Lee-Gu;Chu, Gyo-Hyeok;Kim, Sang-Sik;Seong, Man-Yeong
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.8
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    • pp.463-467
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    • 2000
  • In this paper, the new LIGBT structures with trap injection are proposed to improve switching characteristics of the conventional SOI LIGBT. The Simulations are performed in order to investigate the effects of the positiion, whidth and concentration of trap injection region with a reduced minority carrier lifetime using 2D device simulator MEDICI. Their electrical characteristics are analyzed and the optimum design parameters are extracted. As a result of simulation, the turn off time for the model A with the trap injection is $0.78\mus$. These results indicate the improvement of about 2 times compared with the conventional SOI LIGBT because trap injection prevents minority carriers which is stored in the n-drift region during turn off switching. The latching current is $1.5\times10^{-4}A/\mum$ and forward blocking voltage is 168V which are superior to those of conventional structure. It is shown that the trap injection is very effective to reduce the turn off time with a little increasing of on-state voltage drop if its design and process parameters are optimized.

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Efficient Organic Light-emitting Diodes using Hole-injection Buffer Layer

  • Chung, Dong-Hoe;Kim, Sang-Keol;Lee, Joon-Yng;Hong, Jin-Woong;Cho, Hyun-Nam;Kim, Young-Sik;Kim, Tae-Wan
    • Journal of Information Display
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    • v.4 no.1
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    • pp.29-33
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    • 2003
  • We have investigated the effects of hole-injection buffer layer in organic light-emitting diodes using copper phthalocyanine (CuPc), poly(vinylcarbazole)(PVK), and Poly(3,4-ethylene dioxythiophene):poly(styrenesulfonate) (PEDOT: PSS) in a device structure of $ITO/bufferr/TPD/Alq_3/Al$. Polymer PVK and PEDOT:PSS buffer layer were produced using the spin casting method where as the CuPc layer was produced using thermal evaporation. Current-voltage characteristics, luminance-voltage characteristics and efficiency of device were measured at room temperature at various a thickness of the buffer layer. We observed an improvement in the external quantum efficiency by a factor of two, four, and two and half when the CuPc, PVK, and PEDOT:PSS buffer layer were used, respectively. The enhancement of the efficiency is assumed to be attributed to the improved balance of holes and elelctrons resulting from the use of hole-injection buffer layer. The CuPc and PEDOT:PSS layer function as a hole-injection supporter and the PVK layer as a hole-blocking one.