• Title/Summary/Keyword: Block Mode

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Fast Inter Mode Decision Algorithm Based on Macroblock Tracking in H.264/AVC Video

  • Kim, Byung-Gyu;Kim, Jong-Ho;Cho, Chang-Sik
    • ETRI Journal
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    • v.29 no.6
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    • pp.736-744
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    • 2007
  • We propose a fast macroblock (MB) mode prediction and decision algorithm based on temporal correlation for P-slices in the H.264/AVC video standard. There are eight block types for temporal decorrelation, including SKIP mode based on rate-distortion (RD) optimization. This scheme gives rise to exhaustive computations (search) in the coding procedure. To overcome this problem, a thresholding method for fast inter mode decision using a MB tracking scheme to find the most correlated block and RD cost of the correlated block is suggested for early stop of the inter mode determination. We propose a two-step inter mode candidate selection method using statistical analysis. In the first step, a mode is selected based on the mode information of the co-located MB from the previous frame. Then, an adaptive thresholding scheme is applied using the RD cost of the most correlated MB. Secondly, additional candidate modes are considered to determine the best mode of the initial candidate modes that does not satisfy the designed thresholding rule. Comparative analysis shows that a speed-up factor of up to 70.59% is obtained when compared with the full mode search method with a negligible bit increment and a minimal loss of image quality.

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Enhanced Inter Mode Decision Based on Contextual Prediction for P-Slices in H.264/AVC Video Coding

  • Kim, Byung-Gyu;Song, Suk-Kyu
    • ETRI Journal
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    • v.28 no.4
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    • pp.425-434
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    • 2006
  • We propose a fast macroblock mode prediction and decision algorithm based on contextual information for Pslices in the H.264/AVC video standard, in which the mode prediction part is composed of intra and inter modes. There are nine $4{\times}4$ and four $16{\times}16$ modes in the intra mode prediction, and seven block types exist for the best coding gain based on rate-distortion optimization. This scheme gives rise to exhaustive computations (search) in the coding procedure. To overcome this problem, a fast inter mode prediction scheme is applied that uses contextual mode information for P-slices. We verify the performance of the proposed scheme through a comparative analysis of experimental results. The suggested mode search procedure increased more than 57% in speed compared to a full mode search and more than 20% compared to the other methods.

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Image Contents Based Intra predictive Coding for H.264/AVC (H.264/AVC를 위한 영상 내용 기반 인트라 예측 부호화)

  • Sin, Se-ill;Kim, Jin-Tea;Oh, Jeong-Su
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.7C
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    • pp.681-686
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    • 2009
  • In H.264/Ave, an intra prediction added to the P-frame coding slightly improves both of image quality and bit rate, but greatly increases an amount of computation. In order to reduce the increase in computation, this paper proposes an image contents based intra prediction coding using characteristics that the best intra block mode depends on the image content of a macro block. The proposed algorithm estimates the image content with image complexity and the best inter block mode, and then selects or excludes a intra block mode on the basis of it. The simulation results show that the proposed algorithm reduces average O.OldB in image quality, and increases average 0.38% in the bit rate, but reduces average 37.02% in computation time compared with the conventional algorithm.

Fast Decision Method of Geometric Partitioning Mode and Block Partitioning Mode using Hough Transform in VVC (허프 변환을 이용한 VVC의 기하학 분할 모드 및 블록 분할 고속 결정 방법)

  • Lee, Minhun;Park, Juntaek;Bang, Gun;Lim, Woong;Sim, Donggyu;Oh, Seoung-Jun
    • Journal of Broadcast Engineering
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    • v.25 no.5
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    • pp.698-708
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    • 2020
  • VVC (Versatile Video Coding), which has been developing as a next generation video coding standard. Compared to HEVC (High Efficiency Video Coding), VVC is improved by about 34% in RA (Random Access) configuration and about 30% in LDB (Low-Delay B) configuration by adopting various techniques such as recursive block partitioning structure and GPM (Geometric Partitioning Mode). But the encoding complexity is increased by about 10x and 7x, respectively. In this paper, we propose a fast decision method of GPM mode and block partitioning using directionality of block to reduce encoding complexity of VVC. The proposed method is to apply the Hough transform to the current block to identify the directionality of the block, thereby determining the GPM mode and the specific block partitioning method to be skipped in the rate-distortion cost search process. As a result, compared to VTM8.0, the proposed method reduces about 31.01% and 29.84% encoding complexity for RA and LDB configuration with 2.48% and 2.69% BD-rate loss, respectively.

Fast Intermode Decision Method Using CBP on Variable Block Coding (가변 블록 부호화에서 CBP를 이용한 고속 인터모드 결정 방법)

  • Ryu, Kwon-Yeol
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.7
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    • pp.1589-1596
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    • 2010
  • In this paper, we propose the method that reduce computational complexity for intermode decision using CBP(coded block pattern) and coded information of colocated-MB(macro block). Proposed method classifies MB into best-CBP and normal-CBP according to the characteristics of CBP. On best-CBP, it eliminates the computation for $8{\times}8$ mode on intermode decision process because the probability for SKIP mode and M-Type mode is 96.3% statistically. On normal-CBP, it selectively eliminates the amount of computation for bit-rate distortion cost, because it uses coded information of colocated-MB and motion vector cost in deciding SKIP mode and M-Type mode. The simulation results show that the proposed method reduces total coding time to 58.44% in average, and is effective in reducing computational burden in videos with little motion.

Video Quality for DTV Essential Hidden Area Utilization

  • Han, Chan-Ho
    • Journal of Multimedia Information System
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    • v.4 no.1
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    • pp.19-26
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    • 2017
  • The compression of video for both full HD and UHD requires the inclusion of extra vertical lines to every video frame, named as the DTV essential hidden area (DEHA), for the effective functioning of the MPEG-2/4/H encoder, stream, and decoder. However, while the encoding/decoding process is dependent on the DEHA, the DEHA is conventionally viewed as a redundancy in terms of channel utilization or storage efficiency. This paper proposes a block mode DEHA method to more effectively utilize the DEHA. Partitioning video block images and then evenly filling the representative DEHA macroblocks with the average DC coefficient of the active video macroblock can minimize the amount of DEHA data entering the compressed video stream. Theoretically, this process results in smaller DEHA data entering the video stream. Experimental testing of the proposed block mode DEHA method revealed a slight improvement in the quality of the active video. Outside of this technological improvement to video quality, the attractiveness of the proposed DEHA method is also heightened by the ease that it can be implemented with existing video encoders.

Development of The M-PHY AFE Block Using Universal Components (범용 부품을 이용한 M-PHY AFE Block 개발)

  • Choi, Byung Sun;Oh, Ho Hyung
    • Journal of the Semiconductor & Display Technology
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    • v.14 no.2
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    • pp.67-72
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    • 2015
  • For the development of UFS device test system, M-PHY specifications should be matched with MIPI-standard which is analog signal protocol. In this paper, the implementation methodology and hardware structure for the M-PHY AFE (Analog Front End) Block was suggested that it can be implemented using universal components without ASIC process. The testing procedure has a jitter problem so to solve the problems we using ASIC process, normally but the ASIC process needs a lot of developing cost making the UFS device test system. In is paper, the suggestion was verified by the output signal which was compared to the MIPI-standard on the Prototype-board using universal components. The board was reduced the jitter on the condition of HS-TX and 5.824 Gbps Mode in SerDes (Serialize-deserializer). Finally, the suggestion and developed AFE block have a useful better than ASIC process on developing costs of the industrial UFS device test system.

A study on the Fast Block Mode Decision Algorithm for Inter Block (Inter 블록을 위한 고속 블록 모드 결정 알고리즘에 관한 연구)

  • 김용욱;허도근
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.6
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    • pp.1121-1125
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    • 2004
  • This paper is studied the fast block mode decision algorithm for H.264/AVC. The fast block mode decision algorithm is consist of block range decision and merge algorithm. The block range decision algorithm classifies the block over 8$\times$8 size or below for 16$\times$16 macroblock to decide the size and type of sub blocks. The block over 8$\times$8 size is divided into the blocks of 16$\times$8, 8$\times$16 and 16$\times$16 size using merging algorithm which is considered MVD(motion vector difference) of 8$\times$8 block. The sub block range decision reduces encoding arithmetic amount by 48.25% on the average more than the case not using block range decision.

A study on the Improvement of Performance for H.264/AVC Encoder (H.264/AVC 부호기의 성능 향상에 관한 연구)

  • Kim Yong-Wook;Huh Do-Cuen
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.8 no.7
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    • pp.1405-1409
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    • 2004
  • This paper is studied new block mode decision algorithm for H.264/AVC. The fast block mode decision algorithm is consist of block range decision algorithm. The block range decision algorithm classifies the block over 8$\times$8 size or below for 16${\times}$16 macroblock to decide the size and type of sub blocks. As the sub blocks of 8$\times$8, 8r4, 4$\times$8 and 4$\times$4, which are the blocks below 8$\times$8 size, include important motion information, the exact sub block decision is required. RDC(RDO cost) is used as the matching parameter for the exact sub block decision. RDC is calculated with motion strength which is the mean value of neighbor pixels of each sub block. The sub block range decision reduces encoding arithmetic amount by 34.62% on the average more than the case not using block range decision. The block mode decision using motion strength shows improvement of PSNR of 0.05[dB].

Design of a High Performance $8{\times}8$ Multiplier Using Current-Mode Quaternary Logic Technique (전류 모드 4치 논리 기술을 이용한 고성능 $8{\times}8$ 승산기 설계)

  • Kim, Jong-Soo;Kim, Jeong-Beom
    • Proceedings of the KIEE Conference
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    • 2003.11b
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    • pp.267-270
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    • 2003
  • This paper proposes high performance $8{\times}8$ multiplier using current-mode quaternary logic technique. The multiplier is functionally partitioned into the following major sections: partial product generator block(binary-quaternary logic conversion), current-mode quaternary logic full-adder block, quaternary-binary logic conversion block. The proposed multiplier has 4.5ns of propagation delay and 6.1mW of power consumption. Also, this multiplier can easily adapted to binary system by the encoder, the decoder. This circuit is simulated under 0.35um standard CMOS technology, 5uA unit current, and 3.3V supply voltage using Hspice.

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