• Journal of the Korean Society of Manufacturing Process Engineers
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• v.3 no.1
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• pp.90-94
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• 2004

Generally, a hydraulic cylinder block which is one of a vehicle parts that plays Important role in excavator power transmission, has copper alloy separation phenomenon by sliding motion between metals in high pressure condition. In this paper, to solve this problem, the interfacial reaction layer of Fe-Cu With SCM440 and copper alloy is studied through the melting method. As the result of this study, it is found that the interfacial reaction layer of $1{\mu}m$ created in the interface of Fe-Cu which has very strong physical bonding. It has been also confirmed that the melting method can improve life of the hydraulic cylinder block.

• Journal of the Korea Computer Industry Society
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• v.10 no.4
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• pp.167-176
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• 2009

In this paper, we propose an improved SHACAL-1 of the same encryption and decryption with a simple symmetric layer. SHACAL-1 has 4 rounds, and each round has 20 steps. Decryption is becoming inverse function of encryption, In this paper, we proposed SHACAL-1 are composed of the first half, symmetry layer and the last half. The first half with SHACAL-1 encryption algorithm 1 round does with 10 steps and composes of 4 round. The last half identically with SHACAL-1 decryption algorithm, has a structure. On the center inserts a symmetry layer, encryption and decryption algorithm identically, composes. In the experiments, the proposed SHACAL-1 algorithm showed similar execution time to that of the SHACAL-1. Thanks to the symmetric layer, the proposed algorithm makes it difficult for the attacks which take advantages of high probability path such as the linear cryptanalysis, differential cryptanalysis. The proposed algorithm can be applicable to the other block cipher algorithms which have different encryption and decryption and useful for designing a new block cipher algorithm.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.5
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• pp.430-437
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• 2021

In this paper, we propose a robust face recognition method against soft errors with a deep convolutional generative adversarial network(DCGAN) based compensation method by a cross-layer approach. When soft-errors occur in block data of JPEG files, these blocks can be decoded inappropriately. In previous results, these blocks have been replaced using a mean face, thereby improving recognition ratio to a certain degree. This paper uses a DCGAN-based compensation approach to extend the previous results. When soft errors are detected in an embedded system layer using parity bit checkers, they are compensated in the application layer using compensated block data by a DCGAN-based compensation method. Regarding soft errors and block data loss in facial images, a DCGAN architecture is redesigned to compensate for the block data loss. Simulation results show that the proposed method effectively compensates for performance degradation due to soft errors.

• Convergence Security Journal
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• v.20 no.4
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• pp.177-186
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• 2020

In current public blockchain, any node can see every blocks, so that public blockchain provider transparent property. However, some application requires the confidential information to be stored in the block. Therefore, this paper proposes a multi-layer blockchain that have the public block layer and the private block for confidential information. This paper suggests the requirement for encryption of private block. Also, this paper shows the t-of-n threshold cryptosystem without dealer who is trusted third party. Moreover, the delegated node who has key information can be withdraw the delegated node group or a new delegated node can join in the delegated node group. Therefore, the paper proposes an efficient key information resharing scheme for withdraw and join. Finally proposed scheme satisfies the requirements for encryption and fairness.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.46 no.4
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• pp.21-30
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• 2009

Fusion flash memory such as OneNAND$^{TM}$ is popular as a ubiquitous storage device for embedded systems because it has advantages of NAND and NOR flash memory that it can support large capacity, fast read/write performance and XIP(eXecute-In-Place). Besides, OneNAND$^{TM}$ provides not only advantages of hybrid structure but also multi-block erase function that improves slow erase performance by erasing the multiple blocks simultaneously. But traditional NAND Flash Translation Layer may not fully support it because the garbage collection of traditional FTL only considers a few block as victim block and erases them. In this paper, we propose an Erase Group Flash Translation Layer for improving multi-block erase function. EGFTL uses a superblock scheme for enhancing garbage collection performance and invalid block management to erase multiple blocks simultaneously. Also, it uses clustered hash table to improve the address translation performance of the superblock scheme. The experimental results show that the garbage collection performance of EGFTL is 30% higher than those of traditional FTLs, and the address translation performance of EGFTL is 5% higher than that of Superblock scheme.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.949-952
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• 2009

In this paper, a watermarking method based on the trellis code with multi-layer is proposed. An image is divided $8{\times}8$ block with no overlapping, and compute the discrete cosine transform(DCT) of each block, and the 12 medium-frequency AC terms from each block are extracted. Next it is compared with gaussian random vectors with zero mean and unit variance. As these processing, the embedding vectors with minimum linear correlation can be obtained by Viterbi algorithm at each layer of trellis coding. To evaluate the performance of proposed method, the average bit error rate of watermark message is calculated from different several images.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.1
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• pp.1-13
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• 2009

Flash memory is widely used as a storage medium of mobile devices such as MP3 players, cellular phones and digital cameras due to its tiny size, low power consumption and shock resistant characteristics. Currently, there are many studies to replace HDD with flash memory because of its numerous strong points. To use flash memory as a storage medium, FTL(Flash Translation Layer) is required since flash memory has erase-before-write constraints and sizes of read/write unit and erase unit are different from each other. Recently, new type of flash memory called "large block flash memory" is introduced. The large block flash memory has different physical structure and characteristics from previous flash memory. So existing FTLs are not efficiently operated on large block flash memory. In this paper, we propose an efficient FTL for large block flash memory based on FAST(Fully Associative Sector Translation) scheme and page-level mapping on data blocks.

• Journal of the Korean Vacuum Society
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• v.19 no.2
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• pp.81-90
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• 2010

We introduce a novel and versatile approach for preparing self-assembled nanoporous multilayered films with antireflective properties. Protonated polystyrene-block-poly (4-vinylpyrine) (PS-b-P4VP) and anionic polystyrene-block-poly (acrylic acid) (PS-b-PAA) block copolymer micelles (BCM) were used as building blocks for the layer-by-layer assembly of BCM multilayer films. BCM film growth is governed by electrostatic and hydrogen-bonding interactions between the oppositely BCMs. Both film porosity and film thickness are dependent upon the charge density of the micelles, with the porosity of the film controlled by the solution pH and the molecular weight (Mw) of the constituents. PS7K-b-P4VP28K/PS2K-b-PAA8K films prepared at pH 4 (for PS7K-b-P4VP28K) and pH 6 (for PS2K-b-PAA8K) are highly nanoporous and antireflective. In contrast, PS7K-b-P4VP28K/PS2K-b-PAA8K films assembled at pH 4/4 show a relatively dense surface morphology due to the decreased charge density of PS2K-b-PAA8K. Films formed from BCMs with increased PS block and decreased hydrophilic block (P4VP or PAA) size (e.g., PS36K-b-P4VP12K/PS16K-b-PAA4K at pH 4/4) were also nanoporous. Furthermore, we demonstrate that the nanostructured electrochemical sensors based on patterning methods show the electrochemical activities. Anionic poly(styrene sulfonate) (PSS) layers were selectively and uniformly deposited onto the catalase (CAT)-coated surface using the micro-contact printing method. The pH-induced charge reversal of catalase can provide the selective deposition of consecutive PE multilayers onto patterned PSS layers by causing the electrostatic repulsion between next PE layer and catalase. Based on this patterning method, the hybrid patterned multilayers composed of platinum nanoparticles (PtNP) and catalase were prepared and then their electrochemical properties were investigated from sensing $H_2O_2$ and NO gas. This study was based on the papers reported by our group. (J. Am. Chem. Soc. 128, 9935 (2006); Adv. Mater. 19, 4364 (2007); Electro. Mater. Lett. 3, 163 (2007)).

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1597-1599
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• 2007

In TFT-LCD, mura is a defect which degrades the display quality. The resistance difference between gate lines is the main cause of H-Block mura. Two methods could eliminate this defect. A thinner gate layer or gate fan-out pattern decrease mura level. H-Block mura has been reduced after implementing the new schemes.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.63-70
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• 2004

This paper describes the link layer and physical layer of the Serial ATA which is the next generation for parallel ATA specification that defines data transfer between PC and peripheral storage devices. The link layer consists of CRC generation/error detection, 8b/10b decoding/encoding, primitive generation/detection block. For the physical layer, it includes CDR(Cock Data Recovery), transmission PLL, serializer/de-serializer. It also includes generation and receipt of OOB(Out-Of-Band) signal, impedance calibration, squelch circuit and comma detection/generation. Additionally, this chip includes TCB(Test Control Block) and BIST(Built-In Selt Test) block to ease debugging and verification. It is fabricated with 0.18${\mu}{\textrm}{m}$ standard CMOS cell library. All the function of the link layer operate properly. For the physical layer, all the blocks operate properly but the data transfer is limited to the 1.28Gbps. This is doe to the affection or parasitic elements and is verified with SPICE simulation.