한국정보디스플레이학회:학술대회논문집
- 2007.08b
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- Pages.1597-1599
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- 2007
Analysis of the Horizontal Block Mura Defect
- Mi, Zhang (Beijing BOE Optoelectronics Technology CO., LTD., Graduate University of the Chinese Academy of Sciences, Student Member, IEEE) ;
- Jian, Guo (Beijing BOE Optoelectronics Technology CO., LTD.) ;
- Chunping, Long (Beijing BOE Optoelectronics Technology CO., LTD.)
- Published : 2007.08.27
Abstract
In TFT-LCD, mura is a defect which degrades the display quality. The resistance difference between gate lines is the main cause of H-Block mura. Two methods could eliminate this defect. A thinner gate layer or gate fan-out pattern decrease mura level. H-Block mura has been reduced after implementing the new schemes.