• Title/Summary/Keyword: Block Ciphers

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Efficient Masking Method to Protect SEED Against Power Analysis Attack (전력 분석 공격에 안전한 효율적인 SEED 마스킹 기법)

  • Cho, Young-In;Kim, Hee-Seok;Choi, Doo-Ho;Han, Dong-Guk;Hong, Seok-Hie;Yi, Ok-Yeon
    • The KIPS Transactions:PartC
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    • v.17C no.3
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    • pp.233-242
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    • 2010
  • In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate results in the algorithm computations(encryption, decryption) are well-known. In case of SEED block cipher, it uses 32 bit arithmetic addition and S-box operations as non-linear operations. Therefore the masking type conversion operations, which require some operating time and memory, are required to satisfy the masking method of all non-linear operations. In this paper, we propose a new masked S-boxes that can minimize the number of the masking type conversion operation. Moreover we construct just one masked S-box table and propose a new formula that can compute the other masked S-box's output by using this S-box table. Therefore the memory requirements for masked S-boxes are reduced to half of the existing masking method's one.

Side-Channel Attacks on LEA with reduced masked rounds (축소 마스킹이 적용된 경량 블록 암호 LEA-128에 대한 부채널 공격)

  • Park, Myungseo;Kim, Jongsung
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.25 no.2
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    • pp.253-260
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    • 2015
  • The side-channel attack is widely known as an attack on implementations of cryptographic algorithms using additional side-channel information such as power traces, electromagnetic waves and sounds. As a countermeasure of side channel attack, the masking method is usually used, however full-round masking makes the efficiency of ciphers dramatically decreased. In order to avoid such a loss of efficiency, one can use reduced-round masking. In this paper, we describe a side channel attack on the lightweight block cipher LEA with the first one~six rounds masked. Our attack is based on differentials and power traces which provide knowledge of Hamming weight for the intermediate data computed during the enciphering of plaintexts. According to our experimental result, it is possible to recover 25 bits of the first round key in LEA-128.

New Power Analysis Attack on The Masking Type Conversion Algorithm (마스킹 형태 변환 알고리즘에 대한 새로운 전력 분석 공격)

  • Cho, Young-In;Kim, Hee-Seok;Han, Dong-Guk;Hong, Seok-Hie;Kang, Ju-Sung
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.1
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    • pp.159-168
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    • 2010
  • In the recent years, power analysis attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate results in the algorithm computations(encryption, decryption, and key-schedule) are well-known. The type conversion of masking is unavoidable since Boolean operation and Arithmetic operation are performed together in block cipher. Messerges proposed a masking type conversion algorithm resistant general power analysis attack and then it's vulnerability was reported. We present that some of exiting attacks have some practical problems and propose a new power analysis attack on Messerges's algorithm. After we propose the strengthen DPA and CPA attack on the masking type conversion algorithm, we show that our proposed attack is a practical threat as the simulation results.

White-Box AES Implementation Revisited

  • Baek, Chung Hun;Cheon, Jung Hee;Hong, Hyunsook
    • Journal of Communications and Networks
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    • v.18 no.3
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    • pp.273-287
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    • 2016
  • White-box cryptography presented by Chow et al. is an obfuscation technique for protecting secret keys in software implementations even if an adversary has full access to the implementation of the encryption algorithm and full control over its execution platforms. Despite its practical importance, progress has not been substantial. In fact, it is repeated that as a proposal for a white-box implementation is reported, an attack of lower complexity is soon announced. This is mainly because most cryptanalytic methods target specific implementations, and there is no general attack tool for white-box cryptography. In this paper, we present an analytic toolbox on white-box implementations of the Chow et al.'s style using lookup tables. According to our toolbox, for a substitution-linear transformation cipher on n bits with S-boxes on m bits, the complexity for recovering the $$O\((3n/max(m_Q,m))2^{3max(m_Q,m)}+2min\{(n/m)L^{m+3}2^{2m},\;(n/m)L^32^{3m}+n{\log}L{\cdot}2^{L/2}\}\)$$, where $m_Q$ is the input size of nonlinear encodings,$m_A$ is the minimized block size of linear encodings, and $L=lcm(m_A,m_Q)$. As a result, a white-box implementation in the Chow et al.'s framework has complexity at most $O\(min\{(2^{2m}/m)n^{m+4},\;n{\log}n{\cdot}2^{n/2}\}\)$ which is much less than $2^n$. To overcome this, we introduce an idea that obfuscates two advanced encryption standard (AES)-128 ciphers at once with input/output encoding on 256 bits. To reduce storage, we use a sparse unsplit input encoding. As a result, our white-box AES implementation has up to 110-bit security against our toolbox, close to that of the original cipher. More generally, we may consider a white-box implementation of the t parallel encryption of AES to increase security.

Measurements of Encryption and Decryption Times of AES and LEA Algorithms on an Arduino MCU (아두이노를 이용한 AES와 LEA의 암복호화 속도 측정)

  • Kwon, Yeongjun;Shin, Hyungsik
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.971-977
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    • 2019
  • This paper presents an experimental result showing the encryption and decryption times of the AES and LEA algorithms. AES and LEA algorithms are international and Korean standards for block ciphers, respectively. Through experiments, this paper investigates the applicability of the LEA algorithm for light weight IoT devices. In order to measure the encryption and decryption times, 256-bit and 128-bit secret keys were randomly generated for AES and LEA, respectively. Under our test environment using an Arduino microcontroller, the AES algorithm takes about 45ms for encryption and decryption processes, whereas the LEA algorithm takes about 4ms. Even though processing times of each algorithm may vary much under different implementation and test environments, this experimental result shows that the LEA algorithm can be applied to many light weight IoT devices for security goals.

Impossible Differential Cryptanalysis of Reduced Round XTEA and TEA (XTEA와 TEA의 축소된 라운드에 대한 불능 차분 공격)

  • 문덕재;황경덕;이원일;이상진;임종인
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.12 no.4
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    • pp.77-85
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    • 2002
  • We present the impossible differential cryptanalysis of the block cipher XTEA[7] and TEA[6]. The core of the design principle of these block ciphers is an easy implementation and a simplicity. But this simplicity dose not offer a large diffusion property. Our impossible differential cryptanalysis of reduced-round versions of XTEA and TEA is based on this fact. We will show how to construct a 12-round impossible characteristic of XTEA. We can then derive 128-bit user key of the 14-round XTEA with $2^{62.5}$ chosen plaintexts and $2^{85}$ encryption times using the 12-round impossible characteristic. In addition, we will show how to construct a 10-round impossible characteristic or TEA. Then we can derive 128-bit user key or the 11-round TEA with $2^{52.5}$ chosen plaintexts and $2^{84}$ encryption times using the 10-round impossible characteristic.

A Power Analysis Attack Countermeasure Not Using Masked Table for S-box of AES, ARIA and SEED (마스킹 테이블을 사용하지 않는 AES, ARIA, SEED S-box의 전력 분석 대응 기법)

  • Han, Dong-Guk;Kim, Hee-Seok;Song, Ho-Geun;Lee, Ho-Sang;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.2
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    • pp.149-156
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    • 2011
  • In the recent years, power analysis attacks were widely investigated, and so various countermeasures have been proposed. In the case of block ciphers, masking methods that blind the intermediate values in the en/decryption computations are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the countermeasure for S-box must be efficiently constructed in the case of AES, ARIA and SEED. Existing countermeasures for S-box use the masked S-box table to require 256 bytes RAM corresponding to one S-box. But, the usage of the these countermeasures is not adequate in the lightweight security devices having the small size of RAM. In this paper, we propose the new countermeasure not using the masked S-box table to make up for this weak point. Also, the new countermeasure reduces time-complexity as well as the usage of RAM because this does not consume the time for generating masked S-box table.

DPA-Resistant Low-Area Design of AES S-Box Inversion (일차 차분 전력 분석에 안전한 저면적 AES S-Box 역원기 설계)

  • Kim, Hee-Seok;Han, Dong-Guk;Kim, Tae-Hyun;Hong, Seok-Hie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.19 no.4
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    • pp.21-28
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    • 2009
  • In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed, In the case of block ciphers, masking methods that blind the intermediate values in the algorithm computations(encryption, decryption, and key-schedule) are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the inversion of S-box is the most significant part in the case of AES. This fact make various countermeasures be proposed for reducing the cost of masking inversion and Zakeri's method using normal bases over the composite field is known to be most efficient algorithm among these masking method. We rearrange the masking inversion operation over the composite field and so can find duplicated multiplications. Because of these duplicated multiplications, our method can reduce about 10.5% gates in comparison with Zakeri's method.

Optimized Implementation of Lightweight Block Cipher SIMECK and SIMON Counter Operation Mode on 32-Bit RISC-V Processors (32-bit RISC-V 프로세서 상에서의 경량 블록 암호 SIMECK, SIMON 카운터 운용 모드 최적 구현)

  • Min-Joo Sim;Hyeok-Dong Kwon;Yu-Jin Oh;Min-Ho Song;Hwa-Jeong Seo
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.2
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    • pp.165-173
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    • 2023
  • In this paper, we propose an optimal implementation of lightweight block ciphers, SIMECK and SIMON counter operation mode, on a 32-bit RISC-V processor. Utilizing the characteristics of the CTR operating mode, we propose round function optimization that precomputes some values, single plaintext optimization and two plaintext parallel optimization. Since there are no previous research results on SIMECK and SIMON on RISC-V, we compared the performance of implementations with and without precomputation techniques for single plaintext optimization and two plaintext parallel optimization implementations. As a result, the implementations to which the precomputation technique was applied showed a performance improvement of 1% compared to the implementations to which precomputation was not applied.

Design of Multimode Block Cryptosystem for Network Security (네트워크 보안을 위한 다중모드 블록암호시스템의 설계)

  • 서영호;박성호;최성수;정용진;김동욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11C
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    • pp.1077-1087
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    • 2003
  • In this paper, we proposed an architecture of a cryptosystem with various operating modes for the network security and implemented in hardware using the ASIC library. For configuring a cryptosystem, the standard block ciphers such as AES, SEED and 3DES were included. And the implemented cryptosystem can encrypt and decrypt the data in real time through the wired/wireless network with the minimum latency time (minimum 64 clocks, maximum 256 clocks). It can support CTR mode which is widely used recently as well as the conventional block cipher modes such as ECB, CBC and OFB, and operates in the multi-bit mode (64, 128, 192, and 256 bits). The implemented hardware has the expansion possibility for the other algorithms according to the network security protocol such as IPsec and the included ciphering blocks can be operated simultaneously. The self-ciphering mode and various ciphering mode can be supported by the hardware sharing and the programmable data-path. The global operation is programmed by the serial communication port and the operation is decided by the control signals decoded from the instruction by the host. The designed hardware using VHDL was synthesized with Hynix 0.25$\mu\textrm{m}$ CMOS technology and it used the about 100,000 gates. Also we could assure the stable operation in the timing simulation over 100㎒ using NC-verilog.