• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.9A
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• pp.1290-1298
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• 2000

Turbo Code decoder is an iterate decoding technology, which extracts extrinsic information from the bit to be decoded by calculating both forward and backward metrics, and uses the information to the next decoding step Turbo Code shows excellent performance, approaching Shannon Limit at the view of BER, when the size of Interleaver is big and iterate decoding is run enough. But it has the problems which are increased complexity and delay and difficulty of real-time processing due to Interleaver and iterate decoding. In this paper, it is analyzed that MAP(maximum a posteriori) algorithm which is used as one of Turbo Code decoding, and the factor which determines its performance. MAP algorithm proceeds iterate decoding by determining soft decision value through the environment and transition probability between all adjacent bits and received symbols. Therefore, to improve the performance of MAP algorithm, the trust between adjacent received symbols must be ensured. However, MAP algorithm itself, can not do any action for ensuring so the conclusion is that it is needed more algorithm, so to decrease iterate decoding. Consequently, MAP algorithm and Turbo Code performance are analyzed in the nongaussian channel applying Robust equalization technique in order to input more trusted information into MAP algorithm for the received symbols.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.141-150
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• 2010

In this paper, performance of a turbo-coded OFDM system is analyzed and simulated in a power line communication channel. Since the power line communication system typically operates in a hostile environment, turbo code has been employed to enhance reliability of transmitted data. The performance is evaluated in terms of bit error probability. As turbo decoding algorithms, MAP (maximum a posteriori), Max-Log-MAP, and SOVA (soft decision viterbi output) algorithms are chosen and their performances are compared. From simulation results, it is demonstrated that Max-Log-MAP algorithm is promising in terms of performance and complexity. It is shown that performance is improved 3dB by increasing the number of iterations, 2 to 8, and interleaver length of a turbo encoder, 100 to 5000. The results in this paper can be applied to OFDM-based high-speed power line communication systems.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.295-298
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• 2003

In this paper, a novel maximum a posterion (MAP) estimation for the channel decoding of H.264 codes in the presence of transmission error is presented. Arithmetic codes with a forbidden symbol and trellis search techniques are employed in order to estimate the best transmitted. And, there has been growing interest of communication, the research about transmission of exact data is increasing. Unlike the case of voice transmission, noise has a fatal effect on the image transmission. The reason is that video coding standards have used the variable length coding. So, only one bit error affects the all video data compressed before resynchronization. For reasons of that, channel needs the channel codec, which is robust to channel error. But, usual channel decoder corrects the error only by channel error probability. So, designing source codec and channel codec, Instead of separating them, it is tried to combine them jointly. And many researches used the information of source redundancy In received data. But, these methods do not match to the video coding standards, because video ceding standards use not only one symbol but also many symbols in same data sequence. In this thesis, We try to design combined source-channel codec that is compatible with video coding standards. This MAP decoder is proposed by adding semantic structure and semantic constraint of video coding standards to the method using redundancy of the MAP decoders proposed previously. Then, We get the better performance than usual channel coder's.

• Journal of Broadcast Engineering
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• v.21 no.6
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• pp.845-860
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• 2016

This paper proposes a digital watermarking scheme to protect the ownership of the freeview 2D or 3D image such that the viewer watches the image(s) by rendering a arbitrary viewpoint image(s) with the received texture image and its depth image. In this case a viewpoint change attack essentially occurs, even if it is not malicious. In addition some malicious attacks should be considered, which is to remove the embedded watermark information. In this paper, we generate a depth variation map (DVM) to find the locations less sensitive to the viewpoint change. For each LH subband after 3-level 2DDWT for the texture image, the watermarking locations are found by referring the DVM. The method to embed a watermark bit to a pixel uses a linear quantizer whose quantization step is determined according to the energy of the subband. To extract the watermark information, all the possible candidates are first extracted from the attacked image by considering the correlation to the original watermark information. For each bit position, the final extracted bit is determined by a statistical treatment with all the candidates corresponding that position. The proposed method is experimented with various test images for the various attacks and compared to the previous methods to show that the proposed one has excellent performance.

• Journal of Electrical Engineering and Technology
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• v.3 no.3
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• pp.430-435
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• 2008

In the paper, an algorithm called a Constraint algorithm is proposed to solve the fan-in problem occurred in ADC encoding circuits. The Flash ADC architecture uses a double-base number system (DBNS). The DBNS has known to represent the multi-dimensional logarithmic number system (MDLNS) used for implementing the multiplier accumulator architecture of FIR filter in digital signal processing (DSP) applications. The authors use the DBNS with the base 2 and 3 to represent binary output of ADC. A symmetric map is analyzed first, and then asymmetric map is followed to provide addition read DBNS to DSP circuitry. The simulation results are shown for the Double-Base Integer Encoder (DBIE) of the 6-bit ADC to demonstrate an effectiveness of the Constraint algorithm, using $0.18{\mu}\;m$ CMOS technology. The DBIE’s processing speed of the ADC is fast compared to the FAT tree encoder circuit by 0.95 GHz.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.83-86
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• 1999

In this paper, a serially concatenated space-time code (SCSTC) with bandwidth efficiency and high data rate is studied. The suggested SCSTC is composed of space-time code, the convolutional code and Interleaver. The SCSTC has a very high BER performance than the conventional space-time code. The BER performance of the suggested SCSTC can be proven by using computer simulation through the iterative decoding method. The first decoder uses Symbol-MAP algorithm and the second decoder uses Bit-MAP algorithm for decoding tile information bits. The simulation results show the performance of the suggested SCSTC is better than the conventional Space-Time Code.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.7
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• pp.2434-2448
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• 2014

This research proposed the domain division depth map quantization for multiview intermediate image generation using Depth Image-Based Rendering (DIBR). This technique used per-pixel depth quantization according to the percentage of depth bits assigned in domains of depth range. A comparative experiment was conducted to investigate the potential benefits of the proposed method against the linear depth quantization on DIBR multiview intermediate image generation. The experiment evaluated three quantization methods with computer-generated 3D scenes, which consisted of various scene complexities and backgrounds, under varying the depth resolution. The results showed that the proposed domain division depth quantization method outperformed the linear method on the 7- bit or lower depth map, especially in the scene with the large object.

• Journal of Multimedia Information System
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• v.7 no.2
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• pp.165-174
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• 2020

This document outlines a new color image encryption technology development. After splitting the original image into 240-bit blocks and modifying the first block by an initialization vector, an improved Feistel circuit is applied, sponsored by a genetic crossover operator and then strong chaining between the encrypted block and the next clear block is attached to set up the confusion-diffusion and heighten the avalanche effect, which protects the system from any known attack. Simulations carried out on a large database of color images of different sizes and formats prove the robustness of such a system.

• Proceedings of the Korea Society for Simulation Conference
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• 2003.11a
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• pp.165-171
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• 2003

We have developed Virtual Reality Simulator MMI for operator training. MMI communicates with server model and client PC through OPCServer. We used Dataplant for Soft Panel and Simdiagram which shows more sophisticated and reality colors. We used vector method for MCR images instead of conventional bit-map method to protect images during zoom in and zoom out. VBScript and Components were used for real movements and images of instruments. VRMCR panel is consisted of 12 groups and designed to accommodate user's convenience.

• Proceedings of the Korea Society for Simulation Conference
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• 2003.11a
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• pp.147-151
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• 2003

Yield enhancement in semiconductor fabrication is important. Even though DRAM yield loss may be attributed to many problems, the existence of defects on the wafer is one of the main causes. When the defects on the wafer form patterns, it is usually an indication for the identification of equipment problems or process variations. In this paper describes the techniques to automatically classify a failure pattern using a fail bit map.