• IEIE Transactions on Smart Processing and Computing
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• v.4 no.4
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• pp.258-264
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• 2015

The first 77 GHz transceiver that applies a heterodyne structure-based linear frequency modulation-frequency shift keying (LFM-FSK) front-end module (FEM) is presented. An LFM-FSK waveform generator is proposed for the transceiver design to avoid ghost target detection in a multi-target environment. This FEM consists of three parts: a frequency synthesizer, a 77 GHz up/down converter, and a baseband block. The purpose of the FEM is to make an appropriate beat frequency, which will be the key to solving problems in the digital signal processor (DSP). This paper mainly focuses on the most challenging tasks, including generating and conveying the correct transmission waveform in the 77 GHz frequency band to the DSP. A synthesizer test confirmed that the developed module for the signal generator of the LFM-FSK can produce an adequate transmission signal. Additionally, a loop back test confirmed that the output frequency of this module works well. This development will contribute to future progress in integrating a radar module for multi-target detection. By using the LFM-FSK waveform method, this radar transceiver is expected to provide multi-target detection, in contrast to the existing method.

• Journal of IKEEE
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• v.17 no.2
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• pp.163-167
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• 2013

As the mobile services have been increased, the interference of the neighboring base stations is increased and the PIMD(Passive Inter-Modulation Distortion) has been a main issue for the design of base station antenna systems. In this paper, it is proposed the PIMD test method for the active basestation antenna whose radiators are directly connected with main active parts including amplifiers, and we presents its test results using a developed active basestation antenna. From the results, the active basestation antenna has the better PIMD performance than conventional passive structure by 8.4dB. The proposed PIMD test method can be used to get the accurate PIMD test result because the test environment is very similar with real basestation.

• The Journal of the Acoustical Society of Korea
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• v.13 no.2
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• pp.38-49
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• 1994

This paper proposes Echo canceller used in simultaneous two-way ('full-duplex') transmission of data signals over two-wire circuits which can be achieved by using a hybrid coupler. This Echo canceller uses sequential processing instead of parallel processing with conventional adaptive digital filter. This structure reduces the number of multipliers. Thus, this structure is much more suitable for IC implementation. This Echo canceller operates according to the 'Stochastic Iteration Algorithm(SIA).' SIA algorithm has merit of good performance and small hardware requirement.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.17 no.9
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• pp.982-992
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• 1992

We developed the interface system between D-SCAN TV system and the Teletext system to reduce the effect of interline flick. At first, horizontal and vertical signal is separated from the composite signal. The stable vertical sync and horizontal sync is applied to the conventional Teletext system and the its output has R.G.B signal form and the output of the Teletext system. This signal is converted into composite signal and is switched at the video selector system in TV to process the signal by progressive method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.1C
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• pp.55-64
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• 2010

In this paper, we propose a new compensation scheme for combined channel distortions and RF impairments based on the analysis of the impacts of IQ(In-phase/Quadrature) imbalance and phase noise on the OFDM(Orthogonal Frequency Division Multiplexing) system in the direct conversion transceiver and frequency selective fading channel distortion. The proposed scheme estimates the combined distortion by the use of training symbols and the residual distortion by pilot symbols and compensates the combined distortion, including IQ imbalance, phase noise and multipath fading at the same time. The simulation results show that the proposed scheme compensates the combined distortion of IQ imbalance, phase noise and multipath fading simultaneously.

• Journal of Electrical Engineering and information Science
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• v.2 no.5
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• pp.9-16
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• 1997

This paper describes the design of a multistandard video encoder. The proposed encoder accepts conventional NTSC/PAL video signals, It also processes he PAL-plus video signal which is now popular in Europe. The encoder consists of five major building functions which are letter-box converter, color space converter, digital filters, color modulator and timing generator. In order to support multistandard video signals, a programmable systolic architecture is adopted in designing various digital filters. Interpolation digital filters are also used to enhance signal-to-noise ratio of encoded video signals. The input to the encoder can be either YCbCr signal or RGB signal. The outputs re luminance(Y), chrominance(C), and composite video baseband(Y+C) signals. The architecture of the encoder is defined by using Matlab program and is modelled by using Veriflog-HDL language. The overall operation is verified by using various video signals, such as color bar patterns, ramp signals, and so on. The encoder contains 42K gates and is implemented by using 0.6um CMOS process.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1477-1483
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• 2013

This paper proposes a low-voltage current-mode integrator for a continuous-time current-mode baseband channel selection filter. The low-voltage current-mode linear cascode integrator is introduced to offer advantages of high current gain and improved unity-gain frequency. The proposed current-mode integrator has fully differential input and output structure consisting of CMOS complementary circuit. Additional cascode transistors which are operated in linear region are inserted for bias to achieve the low-voltage feature. Frequency range is also controllable by selecting proper bias voltage. From simulation results, it can be noticed that the implemented integrator achieves design specification such as low-voltage operation, current gain, and unity gain frequency.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.590-593
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• 2005

In this paper, it is analyzed a transmission time of ACL Packet in bluetooth wireless link. In order for segment to improve the transfer capability in bluetooth system, it is fragmented in TCP total messages that are coming down from upper layer and then the packets are sent one at time in baseband. And it is studied that transmission time for bluetooth wireless link according to DM1, DM3 or DM5 packet type in bluetooth piconet environment. From the results, we were able to obtain ACL packet transmission time, optimal TCP packet size and DM packet size.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.5A
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• pp.305-310
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• 2012

This paper proposes a selection combined hybrid sequential deconvolution and single carrier modulation with a zero forcing frequency domain equalizer for single carrier transmission system in order to enhance performance. Selection combining method is an algorithm of antenna space diversities, the receiver can choose the best channel environment only with the increase of the number of antennas, but a baseband structure is the same as the traditional receiver architecture. Simulation results show that the proposed algorithm has a better performance rather than the traditional single carrier transmission with a frequency domain equalizer.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.1
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• pp.63-69
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• 2014

RFIDs have not become widespread as expected partly due to the cost, size, read range, and reliability problems of tags. The success rate of reading must be improved in order for RFIDs to be widely adopted. Quality control of tags is crucial to meet this requirement. In this study, we designed and implemented a high-performance reader used in inspection equipment that conducts prior inspection of tags. To improve performance of the developed reader, the baseband modem and command processor (CP) were designed using H/W logic and implemented with FPGA. The inspection of small pitch inlays was made possible through the antenna shielding device and H/W command processor function. This equipment enables accurate evaluation of performance and identification of tags satisfying a given read range. By contributing to sort out defective tags, the results can ultimately lead to more stable RFID services.