• Korean Journal of Materials Research
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• v.22 no.11
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• pp.575-580
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• 2012

The purpose of this study is to investigate the crystalline structure and optical properties of (GaZn)(NO) powders prepared by solid-state reaction between GaOOH and ZnO mixture under $NH_3$ gas flow. While ammoniation of the GaOOH and ZnO mixture successfully produces the single phase of (GaZn)(NO) solid solution within a GaOOH rich composition of under 50 mol% of ZnO content, this process also produces a powder with coexisting (GaZn)(NO) and ZnO in a ZnO rich composition over 50 mol%. The GaOOH in the starting material was phase-transformed to ${\alpha}$-, ${\beta}-Ga_2O_3$ in the $NH_3$ environment; it was then reacted with ZnO to produce $ZnGa_2O_4$. Finally, the exchange reaction between nitrogen and oxygen atoms at the $ZnGa_2O_4$ powder surface forms a (GaZn)(NO) solid solution. Photoluminescence spectra from the (GaZn)(NO) solid solution consisted of oxygen-related red-emission bands and yellow-, green- and blue-emission bands from the Zn acceptor energy levels in the energy bandgap of the (GaZn)(NO) solid solutions.

• Journal of the Semiconductor & Display Technology
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• v.13 no.3
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• pp.45-50
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• 2014

In this paper, we propose a super-junction MOSFET (SJ MOSFET) fabricated through a simple pillar forming process by varying the Si epilayer thickness and doping concentration of pillars using SILVACO TCAD simulation. The design of the SJ MOSFET structure is presented, and the doping concentration of pillar, breakdown voltage ($V_{BR}$) and drain current are analyzed. The device performance of conventional Si planar metal-oxide semiconductor field-effect transistor(MOSFET), Si SJ MOSFET, and SiGe SJ MOSFET was investigated. The p- and n-pillars in Si SJ MOSFET suppressed the punch-through effect caused by drain bias. This lead to the higher $V_{BR}$ and reduced on resistance of Si SJ MOSFET. An increase in the thickness of Si epilayer and decrease in the former is most effective than the latter. The implementation of SiGe epilayer to SJ MOSFET resulted in the improvement of $V_{BR}$ as well as drain current in saturation region, when compared to Si SJ MOSFET. Such a superior device performance of SiGe SJ MOSFET could be associated with smaller bandgap of SiGe which facilitated the drift of carriers through lower built-in potential barrier.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.208-208
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• 2013

Graphene has emerged as a fascinating material for next-generation nanoelectronics due to its outstanding electronic properties. In particular, graphene-based field effect transistors (GFETs) have been a promising research subject due to their superior response times, which are due to extremely high electron mobility at room temperature. The biggest challenges in GFET applications are control of carrier concentration and opening the bandgap of graphene. To overcome these problems, three approaches to doping graphene have been developed. Here we demonstrate the decoration of Ni nanoparticles (NPs) on graphene films by simple annealing for p-type doping of graphene. Ni NPs/graphene films were fabricated by coating a $NiCl2{\cdot}6H2O$ solution onto graphene followedby annealing. Scanning electron microscopy and atomic force microscopy revealed that high-density, uniformly sized Ni NPs were formed on the graphene films and the density of the Ni NPs increased gradually with increasing $NiCl2{\cdot}6H2O$ concentration. The formation of Ni NPs on graphene films was explained by heat-driven dechlorination and subsequent particlization, as investigated by X-ray photoelectron spectroscopy. The doping effect of Ni NPs onto graphene films was verified by Raman spectroscopy and electrical transport measurements.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1277-1279
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• 1994

In the structure of ZnO/nip-SiC: H/metal substrate amorphous silicon (a-Si:H) solar cells, the effects of inserting a rear textured ZnO in the p-SiC:H/metal interface and a graded bandgap buffer layer in the i/p-SiC:H have been analysed by computer simulation. The incident light was taken to have an intensity of $100mW/cm^2$(AM-1). The thickness of the a-Si:H n, ${\delta}$-doped a-SiC:H p, and buffer layers was assumed to be $200{\AA},\;66{\AA}$, and $80{\AA}$, respectively. The scattering coefficients of the front and back ZnO were taken to be 0.2 and 0.7, respectively. Inserting the rear buffer layer significantly increases the open circuit voltage($V_{oc}$) due to reduction of the i/p interface recombination rate. The use of textured ZnO markedly improves collection efficiency in the long wavelengths( above ${\sim}550nm$ ) by back scattering and light confinement effects, resulting in dramatic enhancement of the short circuit current density($J_{sc}$). By using the rear buffer and textured ZnO, the i-layer thickness of the ceil for obtaining the maximum efficiency becomes thinner(${\sim}2500{\AA}$). From these results, it is concluded that the use of textured ZnO and buffer layer at the backside of the ceil is very effective for enhancing the conversion efficiency and reducing the degradation of a-Si:H pin-type solar cells.

• Current Photovoltaic Research
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• v.2 no.3
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• pp.88-94
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• 2014

The structural, optical and electrical properties of sputter-deposited CIGS films were directly influenced by the sputtering process parameters such as substrate temperature, working pressure, RF power and distance between target and substrate. CIGS thin films deposited by using a quaternary target revealed to be Se deficient due to Se low vapor pressure. This Se deficiency affected the overall stoichiometry of the films, causing the films to be Cu-rich. Current tends to pass through the Cu-Se channels which act as the shunting path increasing the film conductivity. The crystal structure of CIGS thin films depends on the substrate orientation due to the influence of surface morphology, grain size and stress of Mo substrate. The excess of Cu was removed from the CIGS films by KCN treatment, achieving a suitable Cu concentration (referred as Cu-poor) for the fabrication of solar cell. Due to high Cu concentrations on the CIGS film surface induced by Cu-Se phases after CIGS film deposition, KCN treatment proved to be necessary for the fabrication of high efficiency solar cells. Also during KCN treatment, dislocation density and lattice parameter decreased as excess Cu was removed, resulting in increase of bandgap and the decrease of conductivity of CIGS films. It was revealed that Cu-Se secondary phase could be removed by KCN wet etching of CIGS films, allowing the fabrication of high efficiency absorber layer.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.29-34
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• 2007

This paper presents a novel photonic bandgap (PBG) structure for size reduction and linearity improvement in power amplifier. The proposed structure is a two-dimensional (2-D) periodic lattice patterned on a dielectric slab that does not require nonplanar fabrication process. Throughout the experi-mental results, this structure has more broad stopband and high suppression performance than conventional three cell PBG and distorted uniplanar compact-PBG (DUC-PBG). This new PBG structure can be applied with power amplifier for linearity improvement. The 3rd intermodulation distortion (IMD3) of the power amplifier using new PBG structure is -36.16 dBc for (code division multiple access) CDMA applications. Compared with power amplifier without the proposed PBG structure, improved IMD3 is -13.49 dBc.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.10
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• pp.461-466
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• 2006

In the present work, we investigated the photodissolution and photodiffusion effect on the interface of Ag/chalcogenide $As_{40}Ge_{10}Se_{15}S_{35}$ thin film by measuring the absorption coefficient, the optical density, the resistance change of Ag layer. It was found that the photodissolutioniphotodiffution ratio depends on the magnitude of photon energy absorbed in the chalcogenide thin film and the depth of photodiffution was proportional to the square root of the exposed time. Also, we have investigated the holographic grating formation with P-polarization states on chalcogenide $As_{40}Ge_{10}Se_{15}S_{35}$ thin film and $As_{40}Ge_{10}Se_{15}S_{35}/Ag$ double layer structure thin film. Holographic gratings have been formed using He-Ne laser (632.8 nm) which have a smaller energy than the optical energy gap, $E_g\;_{opt}$ of the film, i. e., an exposure of sub-bandgap light $(h{\upsilon} under P-polarization. As the results, we found that the diffraction efficiency on $As_{40}Ge_{10}Se_{15}S_{35}/Ag$ double layer structure thin film was more higher than that on single $As_{40}Ge_{10}Se_{15}S_{35}$ thin film. Also, we obtained that the maximum diffraction efficiency was 0.27 %, 1,000 sec on $As_{40}Ge_{10}Se_{15}S_{35}\;(1{\mu}m)/Ag$ (10 nm) double layer structure thin film by (P: P) polarized recording beam. It will offer lots of information for the photodoping mechanism and the analyses of chalcogenide thin films.

• Transactions on Electrical and Electronic Materials
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• v.16 no.3
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• pp.130-134
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• 2015

This research proposes the use of a composition modulated (ZrO₂)_x(Al₂O₃)_1-x film as a charge trapping layer for charge trap flash memory; this is possible when the Zr (Al) atomic percent is controlled to form a variable bandgap as identified by the valence band offsets and electron energy loss spectrum measurements. Compared to memory devices with uniform compositional (ZrO₂)_0.1(Al₂O₃)_0.9 or a (ZrO₂)_0.92(Al₂O₃)_0.08 trapping layer, the memory device using the composition modulated (ZrO₂)_x(Al₂O₃)_1-x as the charge trapping layer exhibits a larger memory window (6.0 V) at the gate sweeping voltage of ±8 V, improved data retention, and significantly faster program/erase speed. Improvements of the memory characteristics are attributed to the special energy band alignments resulting from non-uniform distribution of elemental composition. These results indicate that the composition modulated (ZrO₂)_x(Al₂O₃)_1-x film is a promising candidate for future nonvolatile memory device applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.4
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• pp.251-265
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• 2001

As the device scaling proceeds, the operating voltage(VDD) of giga-bit DRAMs is expected to be reduced to 1.5V or down, fir improving the device reliability and reducing the power dissipation. Therefore the low-voltage circuit design techniques are required to implement giga-bit DRAMs. In this work, state-of-art low-voltage DRAM circuit techniques are reviewed, and four kinds of low-voltage circuit design techniques are newly proposed for giga-bit DRAMs. Measurement results of test chips and SPICE simulation results are presented for the newly proposed circuit design techniques, which include a hierarchical negative-voltage word-line driver with reduced subthreshold leakage current, a two-phase VBB(Back-Bias Voltage) generator, a two-phase VPP(Boosted Voltage) generator and a bandgap reference voltage generator.

• Journal of the Korean Vacuum Society
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• v.7 no.4
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• pp.334-340
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• 1998

Photoreflectance (PR) measurents have been performed on $In_xGa_{1-x}As/GaAs$ grown by molecular beam epitaxy (MBE). Bandgap $(E_0)$ of $In_xGa_{1-x}As$ epilayer measured from PR was separated as heavy-hole $(E_0(HH))$ and light-hole $(E_0(LH))$ by strain effect. The compositions and the strains of epilayer were obtained from the energy value of $E_0(HH)$ and from energy difference of $E_0(HH)$ and $E_0(LH)$, respectively. In addition, the PR signal of $E_0(LH)$ was diminished below 160 K. The interface electric field (E) of InGaAs/GaAs was increased from $0.75{\times}10^5$ V/cm to $2.66{\times}10^5$ V/cm as In composition increased, which was calculated from Franz-Keldysh oscillation (FKO) peaks. As the temperature dependence of the PR signal at x=0.09 sample, we obtained Varshni and Bose-Einstein coefficients.