• 제목/요약/키워드: Balancing capacitor voltage

검색결과 78건 처리시간 0.03초

반도체 변압기용 모듈형 멀티레벨 DC-DC 컨버터의 선택적인 전압 균형 제어 (A Selective Voltage Balancing Scheme of a Modular Multilevel DC-DC Converter for Solid-State Transformers)

  • 이의재;김석민;이교범
    • 전기전자학회논문지
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    • 제23권2호
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    • pp.652-658
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    • 2019
  • 본 논문은 반도체 변압기용 모듈형 멀티레벨 DC-DC 컨버터의 서브모듈 커패시터 전압 균형 제어 기법을 제안한다. 일반적으로 서브모듈 커패시터 전압은 개별적인 피드백 제어기에 의해 균등하게 제어할 수 있으나 모듈 개수에 따라 연산 시간이 증가한다. 본 논문에서 제안하는 전압 균형 제어 기법은 순시적으로 최대/최소 전압 값의 서브모듈만을 선택 및 제어하여 연산 시간을 저감할 수 있다. 시뮬레이션을 통해 제안하는 방법의 성능 및 타당성에 대한 검증을 진행한다.

Modulation, Harmonic Analysis, and Balancing Control for a New Modular Multilevel Converter

  • Li, Binbin;Zhang, Yi;Wang, Gaolin;Xu, Dianguo
    • Journal of Power Electronics
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    • 제16권1호
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    • pp.163-172
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    • 2016
  • The modular multilevel converter (MMC) has been receiving increased attentions in recent years. The new modular multilevel converter is a derivative topology from the traditional MMC in which the number of sub-modules (SMs) necessitated by each phase can be reduced by one. This paper presents a phase-shifted carrier pulse-width modulation (PSC-PWM) for the new MMC with an optimal phase-shifted angle to suppress the harmonics of the output voltage. Further, the harmonic features when the capacitor voltage of the middle SM is selected as two different values are also investigated. Moreover, in order to avoid introducing an unnecessary dc offset current at the ac terminals of the new MMC, a novel capacitor voltage balancing scheme is proposed by adjusting the amplitude of the reference signals rather than the offset. Finally, the validity and effectiveness of the proposed modulation and balancing schemes have been verified by experimental results based on a three-phase prototype of the new MMC.

커패시터 전압 자기 밸런싱 기능이 있는 새로운 6-레벨 인버터 토폴로지 (A Novel Six-Level Inverter Topology with Capacitor Voltage Self-Balancing)

  • 프리바디조나단;이동춘
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2020년도 전력전자학술대회
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    • pp.316-317
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    • 2020
  • In this paper, a novel six-level inverter is proposed. Voltage regulation is applied at DC-link and flying capacitors through the implementation of phase-shifted carrier-based modulation with zero-sequence voltage injection. The performance of the proposed structure has been verified under various modulation indices, where low voltage ripple is achieved at each capacitor and total harmonic distortions (THD) of line voltage at unity modulation index is about 15.95%.

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An Interleaved Five-level Boost Converter with Voltage-Balance Control

  • Chen, Jianfei;Hou, Shiying;Deng, Fujin;Chen, Zhe;Li, Jian
    • Journal of Power Electronics
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    • 제16권5호
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    • pp.1735-1742
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    • 2016
  • This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.

전력용 반도체 소자의 직렬연결시 밀러효과를 이용한 소호시점 동기화 알고리즘 (Synchronization on the Points of Turn -off Time of Series-Connected Power Semiconductor Devices Using the Miller Effect)

  • 심은용;서범석;이택기;현동석
    • 대한전기학회논문지
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    • 제41권3호
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    • pp.237-243
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    • 1992
  • The large value of the snubber capacitor is needed to protect the devices in high voltage converters using series connected power semiconductors. But that results in more losses and longer commutation time. So, new technique of series connection is required, which can minimize the value of snubber capacitor and also promote the reliability of high voltage converters. We study on the switching characteristics of series connected power semiconductors and then propose a novel switching algorithm for series-connection which is able to implement not only the dynamic voltage balancing in spite of the differerce of switching characteristics, but the minimization of the value of snubber capacitor, through the change of the value of snubber capacitor by Miller effect. Finally, we illustrate the validity of this synchronization by computer simulation and experimental results.

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전기자동차 충전소용 양방향 DC-DC 컨버터 기능을 갖는 전압 밸런서 (A New Voltage Balancer With Bidirectional DC-DC Converter Function for EV Charging Station)

  • 남현택;김상훈;차헌녕;김흥근
    • 전력전자학회논문지
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    • 제23권5호
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    • pp.313-320
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    • 2018
  • This study proposes a new voltage balancer with bidirectional DC-DC converter function. The proposed balancer can serve as a voltage balancer and a bidirectional DC-DC converter. Thus, the balancer can be applied to battery management systems or fast chargers in electric vehicles (EVs) charging stations while balancing bipolar DC bus voltages. The proposed system has unlimited voltage balancing range unlike the conventional voltage balancing control using a three-level DC-DC converter. A comparison of the voltage balancing range between the proposed and conventional scheme is explored to confirm this superiority. Simulation and experimental results are provided to validate the effectiveness of the proposed system.

Step-up Switched Capacitor Multilevel Inverter with a Cascaded Structure in Asymmetric DC Source Configuration

  • Roy, Tapas;Bhattacharjee, Bidrohi;Sadhu, Pradip Kumar;Dasgupta, Abhijit;Mohapatra, Srikanta
    • Journal of Power Electronics
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    • 제18권4호
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    • pp.1051-1066
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    • 2018
  • This study presents a novel step-up switched capacitor multilevel inverter (SCMLI) structure. The proposed structure comprises 2 unequal DC voltage sources, 4 capacitors, and 14 unidirectional power switches. It can synthesize 21 output voltage levels. The important features of the proposed topology are its self-voltage boosting and inherent capacitor voltage balancing capabilities. Furthermore, a cascaded structure of the proposed SCMLI with an asymmetric DC voltage source configuration is presented. The proposed topology and its cascaded structure are compared with conventional and other recently developed topologies in terms of different aspects, such as the required components to produce a specific number of output voltage levels, the total standing voltage (TSV) and peak inverse voltage of the structure, and the maximum number of switches in the conducting path. Furthermore, a cost function is developed to verify the cost-effectiveness of the proposed topology with respect to other topologies. The TSV of the proposed topology is significantly lower than those of other topologies. Moreover, the developed topology is cost-effective compared with other topologies. A detailed operating principle, power loss analysis, and selection procedure for switched capacitors are presented for the proposed SCMLI structure. Extensive simulation and experimental studies of a 21-level inverter structure prove the effectiveness and merits of the proposed SCMLI.

Leg-Balancing Control of the DC-link Voltage for Modular Multilevel Converters

  • Du, Sixing;Liu, Jinjun;Lin, Jiliang
    • Journal of Power Electronics
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    • 제12권5호
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    • pp.739-747
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    • 2012
  • This paper applies carrier phase shifted pulse-width modulation (CPS-PWM) to transformerless modular multilevel converters (MMC) to improve the output spectrum. Because the MMC topology is characterized by the double-star connection of six legs consisting of cascaded modular chopper cells with floating capacitors, the balance control of the DC-link capacitor voltage is essential for safe operation. This paper presents a leg-balancing control strategy to achieve DC-link voltage balance under all operating conditions. This strategy based on circulating current decoupling control focused on DC-link balancing between the upper and lower legs in each phase pair by considering the six legs as three independent phase-pairs. Experiments are implemented on a 100-V 3-kVA downscaled prototype. The experimental results show that the proposed leg-balancing control is both effective and practical.

4-레벨 인버터의 DC-링크 전압 균형을 위한 향상된 전압 제어 기법 (An Improved Voltage Control Scheme for DC-Link Voltage Balancing in a Four-Level Inverter)

  • 김래영;이요한;최창호;현동석
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제48권10호
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    • pp.544-554
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    • 1999
  • Multi-level inverters are now receiving widespread interest form the industrial drives for high power variable speed applications. Especially, for the high power variable speed applications, a diode clamped multi-level inverter has been widely used. However, it has the inherent problem that the voltage of the link capacitors fluctuates. This paper describes a voltage control scheme effectively to suppress the DC-link potential fluctuation for a diode clamped four-level inverter. The current to flow from/into the each link capacitor is analyzed and the operation limit is obtained when a conventional SVPWM is used. To overcome the operation limit, a modified carrier-based SVPWM is proposed. Various simulation and experiment results are presented to verify the proposed voltage control scheme for DC-link voltage balancing.

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Three-Level SEPIC with Improved Efficiency and Balanced Capacitor Voltages

  • Choi, Woo-Young;Lee, Seung-Jae
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.447-454
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    • 2016
  • A single-ended primary-inductor converter (SEPIC) features low input current ripple and output voltage up/down capability. However, the switching devices in a two-level SEPIC suffer from high voltage stresses and switching losses. To cope with this drawback, this study proposes a three-level SEPIC that uses a low voltage-rated switch and thus achieves better switching performance compared with the two-level SEPIC. The three-level SEPIC can reduce switch voltage stresses and switching losses. The converter operation and control method are described in this work. The experimental results for a 500 W prototype converter are also discussed. Experimental results show that unlike the two-level SEPIC, the three-level SEPIC achieves improved power efficiency with balanced capacitor voltages.