• Transactions on Electrical and Electronic Materials
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• v.13 no.2
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• pp.106-109
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• 2012

A low power methane gas sensor with microheater was fabricated by silicon bulk micromachining technology. In order to heat up the sensing layer to operating temperature, a platinum (Pt) micro heater was embedded in the gas sensor. The line width and gap of the microheater was 20 ${\mu}m$ and 4.5 ${\mu}m$, respectively. Zinc oxide (ZnO) nanowhisker arrays were grown on a sensor from a ZnO seed layer using a hydrothermal method. A 200 ml aqueous solution of 0.1 mol zinc nitrate hexahydrate, 0.1 mol hexamethylenetetramine, and 0.02 mol polyethylenimine was used for growing ZnO nanowhiskers. Temperature distribution of the sensor was analyzed by infrared thermal camera. The optimum temperature for highest sensitivity was found to be $250^{\circ}C$ although relatively high (64%) sensitivity was obtained even at as low a temperature as $150^{\circ}C$. The power consumption was 72 mW at $250^{\circ}C$, and only 25 mW at $150^{\circ}C$.

• Journal of the Microelectronics and Packaging Society
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• v.18 no.3
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• pp.67-74
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• 2011

Keys to high wiring density semiconductor packages include flip-chip bonding and build-up substrate technologies. The current issues are the establishment of a fine pitch flip-chip bonding technology and a low coefficient of thermal expansion (CTE) substrate technology. In particular, electromigration and thermomigration in fine pitch flipchip joints have been recognized as a major reliability issue. In this paper, electromigration and thermomigration in Cu/Sn-3Ag-0.5Cu (SAC305)/Cu flip-chip joints and electromigration in Cu/In/Cu flip chip joints are investigated. In the electromigration test, a large electromigration void nucleation at the cathode, large growth of intermetallic compounds (IMCs) at the anode, a unique solder bump deformation towards the cathode, and the significantly prolonged electromigration lifetime with the underfill were observed in both types of joints. In addition, the effects of crystallographic orientation of Sn on electromigration were observed in the Cu/SAC305/Cu joints. In the thermomigration test, Cu dissolution was accelerated on the hot side, and formation of IMCs was enhanced on the cold side at a thermal gradient of about $60^{\circ}C$/cm, which was lower than previously reported. The rate of Cu atom migration was found comparable to that of electromigration under current conditions.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.11
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• pp.1879-1886
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• 2016

In this paper, we propose a real-time recognition algorithm of lanes, stop lines and speed bumps on roads for autonomous vehicles. First, we generate a top-view using the image transmitted from a camera that is installed to see the front of a vehicle. To speed up the processing, we simplify the mapping algorithm in constructing a top-view wherein the region of interest (ROI) is concerned. The features of lanes, stop lines and speed bumps, which are composed of lines, are searched in the edge image of the top-view, then followed by labeling and clustering specialized to detect straight lines. The width of lines, distances from the center of a vehicle, and curvature of each cluster are considered to select final candidates. We verify the proposed algorithm on real roads using the commercial car (KIA K7) which is converted into an autonomous vehicle.

• Journal of Korean Society for Atmospheric Environment
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• v.23 no.4
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• pp.478-486
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• 2007

Numerical analysis had been performed to understand flow characteristics of the flue gas and slurry in the absorber of a flue gas desulphurization (FGD) system using computational fluid dynamics (CFD) technique. Two-fluid(Euler-Lagrangian) model had been employed to simulate physical phenomenon, which slurry particles injected through slurry spray nozzles fall down and bump into the flue gas inflowing through inlet duct. It was not necessary to adopt pre-defined pressure drop inside the absorber because interaction between flue gas and slurry particles was considered. Hundreds of slurry spray nozzles were considered with the spray velocity at the nozzles, swirl velocity and spreading angle. The results note that the flow disturbance of flue gas is found at the bottom of the absorber, and the current rising with high speed stream is observed in the opposite region of the inflow duct. The high speed stream is reduced as the flue gas goes up, because the high speed stream of flue gas dumps falling slurry particles due to momentum exchange between flue gas and slurry particles. In spite of some disproportion in slurry distribution inside the absorber, escape of slurry particles from the absorber facility is not observed. The pressure drop inside the absorber is mainly occurred at the bottom section.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2000.04a
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• pp.57-64
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• Journal of the Microelectronics and Packaging Society
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• v.7 no.1
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• ETRI Journal
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• v.38 no.6
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• pp.1163-1171
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• 2016

Integration technologies involving flexible substrates are receiving significant attention owing the appearance of new products regarding wearable and Internet of Things technologies. There has been a continuous demand from the industry for a reliable bonding method applicable to a low-temperature process and flexible substrates. Up to now, however, an anisotropic conductive film (ACF) has been predominantly used in applications involving flexible substrates; we therefore suggest low-temperature lead-free soldering and bonding processes as a possible alternative for flex-on-flex applications. Test vehicles were designed on polyimide flexible substrates (FPCBs) to measure the contact resistances. Solder bumping was carried out using a solder-on-pad process with Solder Bump Maker based on Sn58Bi for low-temperature applications. In addition, thermocompression bonding of FPCBs was successfully demonstrated within the temperature of $150^{\circ}C$ using a newly developed fluxing underfill material with fluxing and curing capabilities at low temperature. The same FPCBs were bonded using commercially available ACFs in order to compare the joint properties with those of a joint formed using solder and an underfill. Both of the interconnections formed with Sn58Bi and ACF were examined through a contact resistance measurement, an $85^{\circ}C$ and 85% reliability test, and an SEM cross-sectional analysis.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.140-151
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• 1996

In this paper, we analyze the variations of thermal characteristics of LD (laser diode) arrays packaged by a flip-chip bonding method. When we simulate the temperature distribution in LD arrays with a BEM (boundary element method) program coded in this paper, we find that thermal crosstalks in LD arrays packaged by the flip-chip bonding method increases by 250-340% compared to that in LD arrays packaged by previous methods. In the LD array module packaged by the flip-chip bonding technique without TEC (thermo-electric cooler), the important parameter is the absolute temperature of the active layer increased due cooler), the important parameter is the absolute temperature of th eactiv elayers of LD arrays to thermal crosstalk. And we find that the temperature of the active layers of LD arrays increases up to 125$^{\circ}C$ whenall four LDs, without a carefully designed heatsink, are turned on, assuming the power consumption of 100mW from each LD. In order to reduce thermal crosstalk we propose a heatsink sturcture which can decrease the temeprature at the active layer by 40%.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.11a
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• pp.21-26
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• 2002

Solder flip chip bumping and subsequent coining processes on PCB were investigated to solve the warpage problem of organic substrates for high pin count flip chip assembly by providing good co-planarity. Coining of solder bumps on PCB has been successfully demonstrated using a modified tension/compression tester with height, coining rate and coining temperature variables. It was observed that applied loads as a function of coined height showed three stages as coining deformation : (1) elastic deformation at early stage, (2) linear increase of applied load, and (3) rapid increase of applied load. In order to reduce applied loads for coining solder bumps on PCB, effects of coining process parameters were investigated. Coining loads for solder bump deformation strongly depended on coining rates and coining temperatures. As coining rates decreased and process temperature increased, coining loads decreased. Among the effect of two factors on coining loads, it was found that process temperature had more significant effect to reduce applied coining loads during the coining process. Lower coining loads were needed to prevent substrate damages such as micro-via failure and build-up dielectric layer thickness change during applying loads. For flip chip assembly, 97Pb/Sn flip chip bumped devices were successfully assembled on organic substrates with 37Pb/Sn coined flip chip bumps.

• Tribology and Lubricants
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• v.39 no.2
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• pp.76-80
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• 2023

This paper describes an experimental investigation of the effect of cooling flow rate on gas foil thrust bearing (GFTB) performance. In a newly developed GFTB test rig, a non-contact type pneumatic cylinder provides static loads to the test GFTB and a high-speed motor rotates a thrust runner up to the maximum speed of 80 krpm. Force sensor, torque arm connected to another force sensor, and thermocouples measures the applied static load, drag torque, and bearing temperature, respectively, for cooling flow rates of 0, 25, and 50 LPM at static loads of 50, 100, and 150 N. The test GFTB with the outer radius of 31.5 mm has six top foils supported on bump foil structures. During the series of tests, the transient responses of the bearing drag torque and bearing temperature are recorded until the bearing temperature converges with time for each cooling flow rate and static load. The test data show that the converged temperature decreases with increasing cooling flow rate and increases with increasing static load. The drag torque and friction coefficient decrease with increasing cooling flow rate, which may be attributed to the decrease in viscosity and lubricant (air) temperature. These test results suggest that an increase in cooling flow rate improves GFTB performance.