• 한국산학기술학회논문지
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• 제12권6호
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• pp.2707-2712
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• 2011

본 논문에서는 400V, 120W 급 LED 구동을 위한 1단 전류 경계모드(Boundary Condition Mode) 제어방식의 역률 개선 제어회로를 설계하였다. 제안하는 제어회로는 역률 개선 및 고조파 발생을 감소시키는 기능을 가지고 있으며, 또한 PFC(Power Factor Correction)회로 내에서 상대적으로 많은 면적을 차지하는 기존의 바이폴라 트랜지스터 구조 대신 새로운 CMOS 회로로 설계하였다. 기존대비, 약 30% 정도의 레이아웃 면적을 줄이게 되었고, 상용화 시 칩의 가격 경쟁력이 클 것으로 사료된다.

• 센서학회지
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• 제24권5호
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• pp.353-357
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• 2015

A new SPICE-compatible model for a gate/body-tied PMOSFET photodetector (GBT PD) with an overlapping control gate is presented. The proposed SPICE-compatible model of a GBT PD with an overlapping control gate makes it possible to control the photocurrent. Research into GBT PD modeling was proposed previously. However, the analysis and simulation of GBT PDs is not lacking. This SPICE model concurs with the measurement results, and it is simpler than previous models. The general GBT PD model is a hybrid device composed of a MOSFET, a lateral bipolar junction transistor (BJT), and a vertical BJT. Conventional SPICE models are based on complete depletion approximation, which is more applicable to reverse-biased p-n junctions; therefore, they are not appropriate for simulating circuits that are implemented with a GBT PD with an overlapping control gate. The GBT PD with an overlapping control gate can control the sensitivity of the photodetector. The proposed sensor is fabricated using a $0.35{\mu}m$ two-poly, four-metal standard complementary MOS (CMOS) process, and its characteristics are evaluated.

• 제어로봇시스템학회논문지
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• 제8권2호
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• pp.136-141
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• 2002

The electrical characteristics of solid state devices such as BJT(Bipolar Junction Transistor) and MOSFET, etc, are altered by impinging nuclear radiation and temperature in the space environment. This phenomenon is well known and has been studied extensively since the early 1960's when satellites were first being designed and used in the United States. However, the studies and the developments of radiation hardening technologies for the electronic components at the industrial fields in our country has not been popular so far. The worst case design technology in the electrical circuit is required for the appropriate operation of solid state devices in the space environment. In this paper, the interface circuit used in KOMPSAT(Korea Multipurpose Satellite), which is now being operated since the one was launched in 1999, is optimally designed to accomodate the worst case design and radiation effect.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권6호
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• pp.601-607
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• 2015

A set of novel silicon controlled rectifier (SCR) devices' characteristics have been analyzed and verified under the electrostatic discharge (ESD) stress. A ring-shaped diffusion was added to their anode or cathode in order to improve the holding voltage (Vh) of SCR structure by creating new current discharging path and decreasing the emitter injection efficiency (${\gamma}$) of parasitic Bipolar Junction Transistor (BJT). ESD current density distribution imitated by 2-dimensional (2D) TCAD simulation demonstrated that an additional current path exists in the proposed SCR. All the related devices were investigated and characterized based on transmission line pulse (TLP) test system in a standard $0.5-{\mu}m$ 24 V CDMOS process. The proposed SCR devices with ring-shaped anode (RASCR) and ring-shaped cathode (RCSCR) own higher Vh than that of Simple SCR (S_SCR). Especially, the Vh of RCSCR has been raised above 33 V. What's more, their holding current is kept over 800 mA, which makes it possible to design power clamp with SCR structure for on chip ESD protection and keep the protected chip away from latch-up risk.