• Proceedings of the KIEE Conference
• /
• 1992.07b
• /
• pp.809-812
• /
• 1992

Charateristics of the ECR etch were Investigated about $MoSi_2$ layer which is widely used for the capping layer and barrier layer in VLSI metallization. The etch rate was evaluated according to gas ratio of $SF_6/BCl_3$, $N_2$ flow rate, RF power and chamber pressure. The chamber pressure, the most important factor, represented the maximum etch rate at about the pressure of 10 mTorr.

• Proceedings of the KOSOMBE Conference
• /
• v.1994 no.05
• /
• pp.57-59
• /
• 1994

In this paper, we present the software part of the intelligent data processing unit (IDPU), which plays an important role in SiMACS. The software system processes ECG, EEG, EMG, blood pressure, respiration, temperature signals, and extracts some information about patient conditions. It displays the patient condition information and the signal data synchronously, and manages them together with other patient personal data in a network-based client/server environment. The software system is designed in an object-oriented paradigm, and implemented in C++ as a window-based application program.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.491-494
• /
• 2006

A number of research groups and companies have succeeded in employing various SLS schemes to create low defect-density Si films on glass substrates for making high performance TFTs. In this paper, we first point out that SLS can be utilized to just as effectively handle crystallization of thin Si films on polymer substrates, and then present preliminary results on high-performance circuits that are built using the materials.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.1744-1749
• /
• 2006

Line-scan SLS of thin Si films permits the attainment of low-defect-density Si films with a directionally solidified microstructure. This paper deals with: (1) identifying and examining the structural defects that are found in the resultant material, (2) how the spatial variations in the type and density of the observed defects may potentially affect the overall uniformity of the resulting devices, and (3) some technical options that may be applied in order to potentially alleviate the situation.

• Proceedings of the KIEE Conference
• /
• 1998.07d
• /
• pp.1462-1464
• /
• 1998

Poly-Si TFT(Thin Film Transistor) is a electronic device that can be applied to the field of large area electronics such as AMLCD. We have fabricated the poly-Si TFT with lateral body terminal that is counter-doped body electrode and investigated the electrical characteristics of it. The lateral body terminal being short with s terminal, we have measured the transfer charac (Vg-ld) and the output characteristic (Vd-ld) fabricated devices. The measured result showe only that leakage current in OFF-state was re and Kink effect in ON-state was suppressed bu that in output characteristic curve the output Id was sustained constantly with the output v Vd in the saturation region.

• Journal of the Korean Ceramic Society
• /
• v.46 no.4
• /
• pp.397-404
• /
• 2009

Using rice husk ash as silica, the influence of the firing temperature and holding time on the color intensity of Pr-$ZrSiO_4$ pigments were investigated. The Pr-yellow pigments were calcined at 500, 700, 800, 900, 950, 1000, $1100^{\circ}C$ in a ceramic method. The synthesized pigments were characterized by DT-TG thermal analysis, X-ray diffraction, UV-Vis spectroscopy, and SEMEDAX analysis. The relationship between the zircon phase-formation growth and Pr-yellow color development was evaluated and the optimum firing conditions were determined. The color of the pigment samples was characterized on the grounds of the Commission Internationale de l'Eclairage (CIE) standard procedure (CIE $L^*a^*b^*$ measurement) after an application on the bisque ceramic tile.

• Proceedings of the Korean Vacuum Society Conference
• /
• 1998.02a
• /
• pp.129-129
• /
• 1998

Most of the surface/interface analysis tools have limited depth profiling c capability in terms of the profiling range and the depth resolution. However, M MEIS can profile the surface and subsurface composition and structure q quantitatively and non-destructively with atomic layer depth resolution. I In this presentation, the MEIS system developed at KRISS will be briefly d described with an introduction on the principle of MEIS. Recent MEIS r results on the surface and interface composition and structural change due to i ion bombardment will be presented for preferential sputtering of T:없Os and d damage depth profiles of SHooD, Pt(l11), and Cu(l1D due to Ar+ ion b bombardment. Direct observation of strained Si lattices and its distribution i in the SHool)-SiCh interface and the initial stage of Co growth on Pt(l11) w will be reported. H surfactant effects on epitaxial growth of Ge on Si(ooD w will be discussed with STM results from SND.

• Journal of the Microelectronics and Packaging Society
• /
• v.2 no.1
• /
• pp.49-58
• /
• 1995

출발물질은 cordierite 유리와 borosilicate/Si3N4 복합분말을 사용하였다. Cordierite 유리조성은 무게비로 17.8MgO-23.1Al2O3-48.1ASiO2-5.0ZnO-1.0B2O3를 선택하였다. Borosilicate/Si3N4복합분말은 sol-gel법으로 a-si3N4 core 분말에 borosilicate 겔을 코팅하여 얻었다. 복합분말과 cordierite 유리 분말을 부피비로 0/100, 12.5/87.5 및 25/75의 조성으로 혼합하여 tape casting 에 의해 green sheet를 제작하였다. 이들 sheet들을 800~100$0^{\circ}C$에서 2시간 소성하여 얻은 시편을 SEM, XRD, 밀도, 유전상수 등을 측정하여 저 유전율의 저온 소성 기판재료를 제조하기 위한 조건들을 검토하였다.

• Proceedings of the KAIS Fall Conference
• /
• 2000.10a
• /
• pp.42-42
• /
• 2000

반응소결 탄화규소는 소결체 내에 잔존 실리콘이 남아 있어 고온강도의 감소를 초래하는 단점이 있어 고온 구조재료로서의 사용이 제한되어 왔다. 따라서 이러한 문제점을 해결하기 위한 방법으로 Si 단독으로 용응침투시키는 대신 Si-MoSi₂를 침투시키는 방법이 시도되고 있으며, 이외에도 TiC 성형체에 Co, Ni 등의 금속, ZrB₂ 성형체에 Zr 금속 등을 용융, 침투시켜 성능향상을 유도하는 연구가 진행되고 있다. 본 연구에서는 반응소결에 대한 기본이론과 응용분야, 반응소결 비산화물계 세라믹스의 제조공정 및 이들 소결체의 미세구조와 기계적 특성 등을 소개하고자 한다.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2002.08a
• /
• pp.159-162
• /
• 2002

This paper reviews an advanced excimer-laser crystallization technique enabling precise location-control of the individual grains. With the developed ${\mu}$-Czochralski (grain-filter) process, the large grains having a diameter of 6 ${\mu}m$ can be set precisely at predetermined positions. We will also discuss the performance of the single-crystalline Si TFTs that are formed within the location-controlled Si grains. The field-effect mobility for electrons is 430 $cm^2/Vs$ on average, which is well comparable to that of TFTs made with silicon-on-insulator wafers.