• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.11
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• pp.2621-2626
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• 2013

This paper has presented the potential distribution for asymmetric double gate(DG) MOSFET, and sloved Poisson equation to obtain the analytical solution of potential distribution. The symmetric DGMOSFET where both the front and the back gates are tied together is three terminal device and has the same current controllability for front and back gates. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine current controllability for front and back gates. To approximate with experimental values, we have used the Gaussian function as doping distribution in Poisson equation. The potential distribution has been observed for gate bias voltage and gate oxide thickness and channel doping concentration of the asymmetric DGMOSFET. As a results, we know potential distribution is greatly changed for gate bias voltage and gate oxide thickness, especially for gate to increase gate oxide thickness. Also the potential distribution for source is changed greater than one of drain with increasing of channel doping concentration.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.691-694
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• 2013

This paper has presented the potential distribution for asymmetric double gate(DG) MOSFET, and sloved Poisson equation to obtain the analytical solution of potential distribution. The symmetric DGMOSFET where both the front and the back gates are tied together is three terminal device and has the same current controllability for front and back gates. Meanwhile the asymmetric DGMOSFET is four terminal device and can separately determine current controllability for front and back gates. To approximate with experimental values, we have used the Gaussian function as charge distribution in Poisson equation. The potential distribution has been observed for gate bias voltage and gate oxide thickness and channel doping concentration of the asymmetric DGMOSFET. As a results, we know potential distribution is greatly changed for gate bias voltage and gate oxide thickness, especially for gate to increase gate oxide thickness. Also the potential distribution for source is changed greater than one of drain with increasing of channel doping concentration.

• Progress in Superconductivity and Cryogenics
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• v.13 no.1
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• pp.17-21
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• 2011

A hybrid superconducting fault current limiter (SFCL) with fast switch had been previously suggested by our research group. To make a hybrid SFCL, different superconducting wires were wound two pancake coils so that two pancake coils had asymmetric configuration. The impedance of the asymmetric non-inductive coils are zero with applied normal current. However during the fault. currents were distributed unequally into the two pancake coils because each superconducting wires have different electrical characteristics. This unequal distribution of current causes effective magnetic flux which generate repulsive force. Fast switch was thus opened by the force applied to the aluminum plate which consists of SFCL. In this paper, the AC loss characteristics of the asymmetric non-inductive coils with combinations of superconducting wires were studied and calculated by related experiments and finite element method (FEM) simulation. From these results, we suggested the appropriate combination of two superconducting wires to be used for the asymmetric non-inductive coils.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.7
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• pp.1617-1622
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• 2015

This paper analyzes the ratio of tunneling current for channel doping concentration of sub-10 nm asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current in subthreshold region increases in the region of channel length of 10 nm below. Even though asymmetric DGMOSFET is developed to reduce short channel effects, the increase of tunneling current in sub-10 nm is inevitable. As the ratio of tunneling current in off current according to channel doping concentration is calculated in this study, the influence of tunneling current to occur in short channel is investigated. To obtain off current to consist of thermionic emission and tunneling current, the analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for channel doping concentration in sub-10 nm asymmetric DGMOSFET, specially with parameters of channel length, channel thickness, and top/bottom gate oxide thickness and voltage.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.1
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• pp.163-168
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• 2015

This paper analyzed the deviation of tunneling current for bottom gate voltage of sub-10 nm asymmetric double gate MOSFET. The asymmetric double gate MOSFET among multi gate MOSFET developed to reduce the short channel effects has the advantage to increase the facts to be able to control the channel current, compared with symmetric double gate MOSFET. The increase of off current is, however, inescapable if aymmetric double gate MOSFET has the channel length of sub-10 nm. The influence of tunneling current was investigated in this study as the portion of tunneling current for off current was calculated. The tunneling current was obtained by the WKB(Wentzel-Kramers-Brillouin) approximation and analytical potential distribution derived from Poisson equation. As a results, the tunneling current was greatly influenced by bottom gate voltage in sub-10 nm asymmetric double gate MOSFET. Especially it showed the great deviation for channel length, top and bottom gate oxide thickness, and channel thickness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.7
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• pp.1311-1316
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• 2016

This paper analyzes the influence of tunneling current on threshold voltage shift by channel length of short channel asymmetric double gate(DG) MOSFET. Tunneling current significantly increases by decrease of channel length in the region of 10 nm below, and the secondary effects such as threshold voltage shift occurs. Threshold voltage shift due to tunneling current is not negligible even in case of asymmetric DGMOSFET to develop for reduction of short channel effects. Off current consists of thermionic and tunneling current, and the ratio of tunneling current is increasing with reduction of channel length. The WKB(Wentzel-Kramers-Brillouin) approximation is used to obtain tunneling current, and potential distribution in channel is hermeneutically derived. As a result, threshold voltage shift due to tunneling current is greatly occurred for decreasing of channel length in short channel asymmetric DGMOSFET. Threshold voltage is changing according to bottom gate voltages, but threshold voltage shifts is nearly constant.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.3
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• pp.575-580
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• 2015

Asymmetric double gate(DG) MOSFET is a novel transistor to be able to reduce the short channel effects. This paper has analyzed a off current for conduction path of asymmetric DGMOSFET. The conduction path is a average distance from top gate the movement of carrier in channel happens, and a factor to change for oxide thickness of asymmetric DGMOSFET to be able to fabricate differently top and bottom gate oxide thickness, and influenced on off current for top gate voltage. As the conduction path is obtained and off current is calculated for top gate voltage, it is analyzed how conduction path influences on off current with parameters of oxide thickness and channel length. The analytical potential distribution of series form is derived from Poisson's equation to obtain off current. As a result, off current is greatly changed for conduction path, and we know threshold voltage and subthreshold swing are changed for this reasons.

• Current Optics and Photonics
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• v.3 no.6
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• pp.583-589
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• 2019

We report experimental results on 940-nm 350-mW AlGaAs/InGaAs transverse single-mode laser diodes (LDs) adopting graded-index separate confinement heterostructures (GRIN-SCH) and p,n-clad asymmetric structures, with improved temperature and small-divergence beam characteristics under high-output-power operation, for a three-dimensional (3D) motion-recognition sensor. The GRIN-SCH design provides good carrier confinement and prevents current leakage by adding a grading layer between cladding and waveguide layers. The asymmetric design, which differs in refractive-index distribution of p-n cladding layers, reduces the divergence angle at high-power operation and widens the transverse mode distribution to decrease the power density around emission facets. At an optical power of 350 mW under continuous-wave (CW) operation, Gaussian narrow far-field patterns (FFP) are measured with the full width at half maximum vertical divergence angle to be 18 degrees. A threshold current (I_th) of 65 mA, slope efficiency (SE) of 0.98 mW/mA, and operating current (I_op) of 400 mA are obtained at room temperature. Also, we could achieve catastrophic optical damage (COD) of 850 mW and long-term reliability of 60℃ with a TO-56 package.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.5
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• pp.992-997
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• 2016

This paper analyzes the deviation of tunneling current for the ratio of top and bottom gate oxide thickness of short channel asymmetric double gate(DG) MOSFET. The ratio of tunneling current for off current significantly increases if channel length reduces to 5 nm. This short channel effect occurs for asymmetric DGMOSFET having different top and bottom gate oxide structure. The ratio of tunneling current in off current with parameters of channel length and thickness, doping concentration, and top/bottom gate voltages is calculated in this study, and the influence of tunneling current to occur in short channel is investigated. The analytical potential distribution is obtained using Poisson equation and tunneling current using WKB(Wentzel-Kramers-Brillouin). As a result, tunneling current is greatly changed for the ratio of top and bottom gate oxide thickness in short channel asymmetric DGMOSFET, specially according to channel length, channel thickness, doping concentration, and top/bottom gate voltages.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.379-383
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• 2003

The subthreshold characteristics of Double-Gate MOSFETs are analyzed for various Tsi. In the lightly-doped asymmetric device, it is found that the subthreshold current dramatically increases as the Tsi increases and this phenomenon is due to the linear distribution of potential in the channel region with low depletion-charge. Further, we derived an analytical equation which can explain this phenomenon and verified the accuracy of analytical equation by comparing with the result of device simulation.