• Title/Summary/Keyword: Array chip

Search Result 534, Processing Time 0.024 seconds

A Decoder Design for High-Speed RS code (RS 코드를 이용한 복호기 설계)

  • 박화세;김은원
    • Journal of the Korean Institute of Telematics and Electronics T
    • /
    • v.35T no.1
    • /
    • pp.59-66
    • /
    • 1998
  • In this paper, the high-speed decoder for RS(Reed-Solomon) code, one of the most popular error correcting code, is implemented using VHDL. This RS decoder is designed in transform domain instead of most time domain. Because of the simplicity in structure, transform decoder can be easily realized VLSI chip. Additionally the pipeline architecture, which is similar to a systolic array is applied for all design. Therefore, This transform RS decoder is suitable for high-rate data transfer. After synthesis with FPGA technology, the decoding rate is more 43 Mbytes/s and the area is 1853 LCs(Logic Cells). To compare with other product with pipeline architecture, this result is admirable. Error correcting ability and pipeline performance is certified by computer simulation.

  • PDF

High Performance Routing Engine for an Advanced Input-Queued Switch Fabric (고속 입력 큐 스위치를 위한 고성능 라우팅엔진)

  • Jeong, Gab-Joong;Lee, Bhum-Cheol
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2002.05a
    • /
    • pp.264-267
    • /
    • 2002
  • This paper presents the design of a pipelined virtual output queue routing engine for an advanced input-queued ATM switch, which has a serial cross bar structure. The proposed routing engine has been designed for wire-speed routing with a pipelined buffer management. It provides the tolerance of requests and grants data transmission latency between the routing engine and central arbiter using a new request control method that is based on a high-speed shifter. The designed routing engine has been implemented in a field programmable gate array (FPGA) chip with a 77MHz operating frequency, 16$\times$16 switch size, and 2.5Gbps/port speed.

  • PDF

Effect of Underfill on $\mu$BGA Reliability ($\mu$BGA 장기신뢰성에 미치는 언더필영향)

  • 고영욱;신영의;김종민
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2002.05a
    • /
    • pp.138-141
    • /
    • 2002
  • There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.

  • PDF

Preparation of Oligonucleotide Arrays with High-Density DNA Deposition and High Hybridization Efficiency

  • Park, Jeong-Won;Jung, Yong-Won;Jung, Young-Hwan;Seo, Jeong-Sun;Lee, Young-Hoon
    • Bulletin of the Korean Chemical Society
    • /
    • v.25 no.11
    • /
    • pp.1667-1670
    • /
    • 2004
  • In DNA microarray produced by DNA-deposition technology, DNA-immobilization and -hybridization yields on a solid support are most important factors for its accuracy and sensitivity. We have developed a dendrimeric support using silylated aldehyde slides and polyamidoamine (PAMAM) dendrimers. An oligonucleotide array was prepared through a crosslinking between the dendrimeric support and an oligonucleotide. Both DNAimmobilization and -hybridization yields on the solid support increased by the modification with the dendrimers. The increase of the immobilization and hybridization efficiency seems to result from a threedimensional arrangement of the attached oligonucleotide. Therefore, our dendrimeric support may provide a simple and efficient solution to the preparation of DNA microarrays with high-density DNA-deposition and high hybridization efficiency.

Evaluation of Mechanical Stress for Solder Joints (솔더접합부에 대한 기계적 스트레스 평가)

  • ;Yoshikuni Taniguchi
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.9 no.4
    • /
    • pp.61-68
    • /
    • 2002
  • Thermal shock testing was used to evaluate reliability that appeared in the solder joints of electronic devices when they were subjected to thermal cycling. Recently, mobile devices have come smaller and multi-functional, with the increasing need for high-density packaging, BGA or CSP has become the main trend for surface mounting technology, and therefore mechanical stress life for solder joints in BGA/CSP type packages has required. Reliability of BGA/CSP solder joints was evaluated with electric resistivity change of daisy chain pattern and stress-strain curve measured using strain gage attached on the surface of PCB under mechanical impact loading. In this report, applications of PCB Universal Testing Machine we have developed and experimental datum of SONY estimating dynamic behavior of mechanical stress in BGA/CSP solder joints are introduced.

  • PDF

Microcantilever-based biosensor using the surface micromachining technique (표면 미세 가공기술을 이용한 마이크로 캔틸레버의 제작과 바이오션서로의 응용)

  • Yoo, Kyung-Ah;Joung, Seung-Ryong;Kang, Chi-Jung;Kim, Yong-Sang
    • Proceedings of the KIEE Conference
    • /
    • 2005.07c
    • /
    • pp.2407-2409
    • /
    • 2005
  • 본 논문에서는 다양한 생물분자 감지를 위한 센서로 마이크로캔틸레버를 제안하였고 이것을 이용해 여러 생물 분자들을 광학적, 전기적으로 분석하였다. 마이로캔틸레버는 표면 미세 가공 기술로 제작되었고, 이러한 제작 방식은 공정이 간단하고 비용이 적게 들며 센서 array가 가능하다는 장점을 갖는다. 생물분자를 포함하는 용액을 주입하기 위하여 PDMS와 fused silica glass를 이용해 fluid cell system을 제작하였다. 마이크로캔틸레버 상단의 gold가 코팅된 부분에서 생물분자의 자기조립 (self assembly)현상이 일어나고 이는 마이크로캔틸레버 상, 하단의 표면 스트레스 차이를 야기 시킨다. 이로 인해 마이크로캔틸레버 자체의 휘어짐 현상이 일어나게 되고 이러한 휘어진 정도를 측정함으로써 마이크로캔틸레버의 생물분자 감지능을 확인할 수 있었다. Cystamine dihydrochloride와 glutaraldehyde 분자를 분석하였고 각기 다른 농도의 cystamine dihydrochloride 용액에서도 실험함으로써 농도별 감지능 또한 확인하였다. 이러한 생물분자 감지를 위한 마이크로캔틸레버의 센서로써의 성능은 u-TAS 와 lab-on-a-chip에서 유용히 이용될 수 있으리라 확신한다.

  • PDF

Nano and micro structures for label-free detection of biomolecules

  • Eom, Kil-Ho;Kwon, Tae-Yun;Sohn, Young-Soo
    • Journal of Sensor Science and Technology
    • /
    • v.19 no.6
    • /
    • pp.403-420
    • /
    • 2010
  • Nano and micro structure-based biosensors are promising tool for label-free detection of biomolecular interactions with great accuracy. This review gives a brief survey on nano and micro platforms to sense a variety of analytes such as DNA, proteins and viruses. Among incredible nano and micro structure for bio-analytical applications, the scope of this paper will be limited to micro and nano resonators and nanowire field-effect transistors. Nanomechanical motion of the resonators transducers biological information to readable signals. They are commonly combined with an optical, capacitive or piezo-resistive detection systems. Binding of target molecule to the modified surface of nanowire modulates the current of the nanowire through electrical field-effect. Both detection methods have advantages of label-free, real-time and high sensitive detection. These structures can be extended to fabricate array-type sensors for multiplexed detection and high-throughput analysis. The biosensors based on these structures will be applied to lab-on-a-chip platforms and point-of-care diagnostics. Basic concepts including detection mechanisms and trends in their fields will be covered in this review.

Fault Models and Diagonousis of Boundary Scan Board (경계스캔이 적용된 보드에서의 고장 모델 및 전단 기법)

  • Moon, Kweon-Woo;Song, Oh-Young
    • Annual Conference of KIPS
    • /
    • 2002.04b
    • /
    • pp.1619-1622
    • /
    • 2002
  • 최근에 생산되는 디지털 VLSI칩들은 그 집적도가 계속 높아지고 있으며, 이러한 칩들을 장착한 보드의 경우도 그 복잡성이 점차 높아지고 있다. 이에 따라 칩 및 보드에 대한 철저한 테스트 과정이 요구된다. 지금까지 보드 테스트 방법으로 널리 쓰였던 ICT(In-Circuit Test)는 칩의 고집적화에 따른 핀 간격의 조밀화와 SMT(Surface Mount Technology), BGA(Ball Grid Array), MCM(Multi Chip Module) 등의 새로운 패키징 방식의 등장에 따라 테스트 방법으로의 한계성을 드러내고 있다. 이에 대한 대안으로 등장한 IEEE Std 1149.1 은 ICT의 한계성을 극복할 수 있는 기술일 뿐 아니라 여러 가지 장점을 가지고 있으며 그 활용 분야도 다양하다. 본 논문에서는 IEEE Std 1149.1에 따라 설계된 보드 상에서 발생 가능한 고장들에 대한 고장 모델을 제시한다. 또한 각 고장 모델들의 양상과 진단 기법을 제시한다. 이를 통해 IEEE Std 1149.1에 따라 설계된 보드 상에서 발생한 고장들을 검출할 수 있으며, 고장의 종류 및 성격, 그리고 고장의 발생 위치 등의 정보를 얻을 수 있다. IEEE Std 1149.1에 따른 보드 설계가 보드의 신뢰성 보장에 긴요함을 인식하는 계기가 되기를 기대하며 제시된 고장 모델 및 진단 기법이 기술적으로 중요한 참고자료가 되기를 기대한다.

  • PDF

Design of FPGA in Power Control Unit for Control Rod Control System (원자로 제어봉 구동장치 제어시스템용 전력제어기 FPGA 설계)

  • Lee, Jong-Moo;Shin, Jong-Ryeol;Kim, Choon-Kyung;Park, Min-Kook;Kwon, Soon-Man
    • Proceedings of the KIEE Conference
    • /
    • 2003.11c
    • /
    • pp.563-566
    • /
    • 2003
  • We have designed the power control unit which belongs to the power cabinet and controls the power supplied to Control Rod Drive Mechanism(CRDM) as a digital system based on Digital Signal Processor(DSP). The power control unit dualized as the form of Master/Slave has had its increased reality. The Central Process Unit(CPU) board of a power control unit possesses two Digital Signal Processors(DSPs) of the control DSP for performing the tasks of power control and system monitoring and the communication of the Control DSP and the Communication DSP. To accomplish the functions requested in the power control unit effectively, we have installed Field Programmable Gate Arrays(FPGAS) on the CPU board and have FPGAs perform the memory mapping, the generation of each chip selection signal, the giving and receiving of the signals between the power controllers dualized, the fault detection and the generation of the firing signals.

  • PDF

Core Chip Design of Baseband PLC Modem using FPGA (FPGA를이용한전력선통신의기저대역핵심코어설계)

  • Hur N. Y.;Shin M. C.;Seo H. S.;Choi S. Y.;Lee K. Y.;Park K. H.;Moon K. H.;Cha J. S.
    • Proceedings of the KIEE Conference
    • /
    • summer
    • /
    • pp.325-326
    • /
    • 2004
  • 전력선통신(PLC: Power Line Communication)은 기존의 전기선을 이용하여 별도의 전용선 설치 없이 통신이 가능한 기술로서 효율적인 PLC 통신을 위해서는 가장 기본적인 기저대역의 송, 수신부상 의 원활한 데이터 전송이 이루어져야 한다. 본 논문에서는 확산대역방식의 PLC통신시스템의 수신부의 핵심모듈인 정합필터를 HDL(hardware description language)을 이용한 디지털 하드웨어인 에 위한 디지털 하드웨어인 FPGA(Field Programmable Gate Array)클 이용하여 구현하였다. 즉, 본 논문에서는 BPSK(Binary Phase Shift Keying) 변조 및 256칩 확산코드를 이용한 확산변조파형에 대한 디지털 정합필터를 FPGA로 구현하고 상관특성을 확인함으로서 모의실험상의 파형과 구현된 하드웨어상의 상관파형이 일치함을 확인하였다.

  • PDF