• 전기학회논문지
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• 제65권10호
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• pp.1702-1705
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• 2016

We propose a novel hydrogen-reduced p-type amorphous silicon oxide buffer layer between $TiO_2$ antireflection layer and p-type silicon window layer of silicon thin film solar cells. This new buffer layer can protect underlying the $TiO_2$ by suppressing hydrogen plasma, which could be made by excluding $H_2$ gas introduction during plasma deposition. Amorphous silicon oxide thin film solar cells with employing the new buffer layer exhibited better conversion efficiency (8.10 %) compared with the standard cell (7.88 %) without the buffer layer. This new buffer layer can be processed in the same p-chamber with in-situ mode before depositing main p-type amorphous silicon oxide window layer. Comparing with state-of-the-art buffer layer of AZO/p-nc-SiOx:H, our new buffer layer can be processed with cost-effective, much simple process based on similar device performances.

• Journal of Ceramic Processing Research
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• 제13권spc2호
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• pp.336-340
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• 2012

Wide band gap p-type hydrogenated amorphous silicon oxide (a-SiO:H) buffer layer has been used at the interface of transparent conductive oxide (TCO) and hydrogenated amorphous silicon (a-Si:H) p-type layer of a p-i-n type a-Si:H solar cell. Introduction of 5 nm thick buffer layer improves in blue response of the cell along with 0.5% enhancement of photovoltaic conversion efficiency (η). The cells with buffer layer show higher open circuit voltage (Voc), fill factor (FF), short circuit current density (Jsc) and improved blue response with respect to the cell without buffer layer.

• Korean Chemical Engineering Research
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• 제47권1호
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• pp.79-83
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• 2009

본 연구에서 고밀도 플라즈마 식각 장치를 사용한 비정질 실리콘 막의 게이트 전극선 형성공정에서 여러 가지 식각 변수가 치수 제어와 식각 속도 및 식각 선택비 등 식각 특성에 미치는 영향을 분석하였다. $Cl_2/HBr/O_2$로 구성된 식각 기체의 전체 유량을 증가시키면 비정질 실리콘의 식각 속도가 증가하나 식각 전후의 형상치수는 변화없이 거의 일정하였다. 전체 유량을 고정시키고 $Cl_2$와 HBr 간의 유량비를 변화시키면 HBr의 유량이 커질수록 비정질 실리콘의 식각 속도가 감소하였다. $O_2$의 유량을 증가시키면 산화막의 식각 속도가 상대적으로 낮아져 식각 선택비를 증가시켜 식각 공정의 안정성을 높이나 게이트 전극선을 경사지게 하는 특성을 보인다. Source power의 증가는 비정질 실리콘 식각 속도의 증가와 더불어 형상치수의 증가를 가져오며, bias power의 증가는 비정질 실리콘과 산화막의 식각 속도를 증가시키나 식각 선택비를 크게 감소시키는 경향을 보였다.

• 한국진공학회지
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• 제3권1호
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• pp.71-76
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• 1994

The electrical characteristics of the capacitor dielectric films of amorphous silicon-nit-ride-oxide(ANO) structures are compared with the capacitor dielectric films of oxide-nitride-oxide (ONO) structrues The electrical characteristics of ONO and ANO films were evaluated by high frequency(1 MHz) C-V high frequency C-V after constant voltage stree I-V TDDB and refresh time measurements. ANO films shows good electrical characteristics such as higher total charge to breakdown storage capacitance and longer refresh time than ONO films. Also it makes little difference that leakage current and flat band voltage shyift(ΔVfb)of ANO ana ONO films.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.406-406
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• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• 한국표면공학회지
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• 제47권1호
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• pp.20-24
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• 2014

Joule heat is generated by applying an electric filed to a conductive layer located beneath or above the amorphous silicon film, and is used to raise the temperature of the silicon film to crystallization temperature. An electric field was applied to an indium tin oxide (ITO) conductive layer to induce Joule heating in order to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced within the range of a millisecond. To investigate the kinetics of Joule-heating induced crystallization (JIC) solid phase crystallization was conducted using amorphous silicon films deposited by plasma enhanced chemical vapor deposition and using tube furnace in nitrogen ambient. Microscopic and macroscopic uniformity of crystallinity of JIC poly-Si was measured to have better uniformity compared to that of poly-Si produced by other methods such as metal induced crystallization and Excimer laser crystallization.

• Current Photovoltaic Research
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• 제7권4호
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• pp.125-129
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• 2019

Recently, carrier-selective contact solar cells have attracted much interests because of its high efficiency with low recombination current density. In this study, we investigated the effect of phosphorus doped amorphous silicon layer's characteristics on the passivation properties of tunnel oxide passivated carrier-selective contact solar cells. We fabricated symmetric structure sample with poly-Si/SiOx/c-Si by deposition of phosphorus doped amorphous silicon layer on the silicon oxide with subsequent annealing and hydrogenation process. We varied deposition temperature, deposition thickness, and annealing conditions, and blistering, lifetime and passivation quality was evaluated. The result showed that blistering can be controlled by deposition temperature, and passivation quality can be improved by controlling annealing conditions. Finally, we achieved blistering-free electron carrier-selective contact with 730mV of i-Voc, and cell-like structure consisted of front boron emitter and rear passivated contact showed 682mV i-Voc.

• 센서학회지
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• 제24권6호
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• pp.379-384
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• 2015

An infrared image sensor is a core device in a thermal imaging system. The fabrication method of a focal plane array (FPA) is a key technology for a high resolution infrared image sensor. Each pixels in the FPA have $Si_3N_4/SiO_2$ membranes including legs to deposit bolometric materials and electrodes on Si readout circuits (ROIC). Instead of polyimide used to form a sacrificial layer, the feasibility of an amorphous silicon (${\alpha}-Si$) was verified experimentally in a $8{\times}8$ micro-bolometer array with a $50{\mu}m$ pitch. The elimination of the polyimide sacrificial layer hardened by a following plasma assisted deposition process is sometimes far from perfect, and thus requires longer plasma ashing times leading to the deformation of the membrane and leg. Since the amorphous Si could be removed in $XeF_2$ gas at room temperature, however, the fabricated micro-bolomertic structure was not damaged seriously. A radio frequency (RF) sputtered nickel oxide film was grown on a $Si_3N_4/SiO_2$ membrane fabricated using a low stress silicon nitride (LSSiN) technology with a LPCVD system. The deformation of the membrane was effectively reduced by a combining the ${\alpha}-Si$ and LSSiN process for a nickel oxide micro-bolometer.

• 전자공학회논문지D
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• 제35D권10호
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• pp.83-90
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• 1998

MOS 캐패시터의 게이트 전극을 비정질 상태의 실리콘으로 형성하여 GOI(Gate Oxide Integrity)특성에 미치는 불순물 활성화 열처리의 효과를 조사하였다. LPCVD(Low Pressure Chemical Vapor Deposition) 방법으로 증착한 비정질 실리콘 게이트 전극은 활성화 열처리에 의하여 다결정 실리콘 상태로 구조가 변화하며, 불순물 원자의 활성화가 충분히 이루어졌다. 또한, 비정질 상태의 게이트 전극은 커다란 압축 응력(compressive stress)을 가지지만, 활성화 열처리 온도가 700℃에서 900℃로 증가함에 따라서 응력이 완화되었고 게이트 전극의 저항도 감소하는 특성을 보였다. 또한 얇은 게이트 산화막의 신뢰성 및 산화막의 계면특성은 활성화 열처리 온도에 크게 의존하고 있었다. 900℃에서 활성화 열처리를 한 경우가 700℃에서 열처리한 경우보다 산화막내에서의 전하 포획 특성이 개선되었으며, 산화막의 신뢰성이 향상되었다. 특히, TDDB 방법으로 예측한 게이트 산화막의 수명은 700℃의 열처리에서는 3×10/sup 10/초였지만, 900℃에서의 열처리에서는 2×10/sup 12/초로 현저하게 개선되었다. 그리고, 산화막 계면에서의 계면 전하 밀도는 게이트의 응력 완화에 따라서 개선되었다.

• 융합정보논문지
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• 제7권5호
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• pp.123-128
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• 2017

나노구조를 갖는 물질들은 나노구조물이 갖는 고유의 체적 대비 높은 표면적 비와 양자 갇힘 효과에 기인하는 독특한 전기적, 광학적, 광전기적, 자기적 특성으로 인하여 많은 주목을 받아왔다. 열화학 기상 증착 공정은 나노 구조물의 성장과정에서 다양한 구조를 갖는 나노소재의 합성 능력 때문에 더욱 주목을 받아왔다. 본 연구에서는 두 영역 열화학 기상 증착법과 소스 물질 $TiO_2$ 파우더를 이용하여 VLS 공정으로 Si\$SiO_2$(300 nm)\Pt(5~40 nm) 기판 위에 실리콘 옥사이드 나노와이어를 성장시켰다. 성장된 실리콘 옥사이드 나노와이어의 형상과 결정학적 특성을 전계방출 주사전자현미경과 투과전자현미경으로 분석하였다. 분석결과, 성장된 실리콘 옥사이드 나노와이어의 형상인 지름과 길이는 촉매 박막의 두께에 의존하여 다른 모양을 나타내었다. 또한 성장된 실리콘 옥사이드 나노와이어는 비정질 상을 갖는 것으로 분석되었다.