• Title/Summary/Keyword: Algorithm Design

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Distributed Throughput-Maximization Using the Up- and Downlink Duality in Wireless Networks (무선망에서의 상하향 링크 쌍대성 성질을 활용한 분산적 수율 최대화 기법)

  • Park, Jung-Min;Kim, Seong-Lyun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.11A
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    • pp.878-891
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    • 2011
  • We consider the throughput-maximization problem for both the up- and downlink in a wireless network with interference channels. For this purpose, we design an iterative and distributive uplink algorithm based on Lagrangian relaxation. Using the uplink power prices and network duality, we achieve throughput-maximization in the dual downlink that has a symmetric channel and an equal power budget compared to the uplink. The network duality we prove here is a generalized version of previous research [10], [11]. Computational tests show that the performance of the up- and downlink throughput for our algorithms is close to the optimal value for the channel orthogonality factor, ${\theta}{\in}$(0.5, 1]. On the other hand, when the channels are slightly orthogonal (${\theta}{\in}$(0, 0.5]), we observe some throughput degradation in the downlink. We have extended our analysis to the real downlink that has a nonsymmetric channel and an unequal power budget compared to the uplink. It is shown that the modified duality-based approach is thoroughly applied to the real downlink. Considering the complexity of the algorithms in [6] and [18], we conclude that these results are quite encouraging in terms of both performance and practical applicability of the generalized duality theorem.

Design of Built-In-Self-Repair Circuit for Embedded Memory Using 2-D Spare Memory (2차원 여분 메모리를 이용한 내장메모리의 자가치유회로 설계)

  • Choi, Ho-Yong;Seo, Jung-Il;Cha, Sang-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.12
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    • pp.54-60
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    • 2007
  • This paper proposes a built-in-self-repair (BISR) structure using 2-dimensional spare memory to effectively self-repair faults of an embedded memory. In case of multiple faults in the same row (column) of an embedded memory, the previous method using 1-D spare column (row) memory needs the same number of spare memory columns (rows) as the number of faults to self-repair them. while the new method using 2-D spare memory needs only one spare row (column) to self-repair them. Also, the virtual divided memory is adopted to be able to self-repair using not a full spare column memory but the only partial spare column memory corresponding to the faults. A self-repair circuit with $64\times1-bit$ core memory and $2\times8$ 2-D spare memory is designed. And the circuit includes a built-in-self-test block using the 13N March algorithm. The circuit has been implemented using the $0.25{\mu}m$ MagnaChip CMOS process and has $1.1\times0.7mm^2$ chip area with 10,658 transistors.

Design and Implementation of Web Interworking Learning System Using VoiceXML (VoiceXML을 이용한 Web 연동 학습 시스템 설계 및 구현)

  • Kim Dong-Hyun;Cho Chang-Su;Shin Jeong-Hoon;Hong Kwang-Seok
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.42 no.2 s.302
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    • pp.21-30
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    • 2005
  • Development of both multimedia technology and communication network technology has accomplished many changes through the field of learning system. For the construction of a more efficient and clever learning system there is a research being done by the use of the Web and the telephone network. But until now, the case of current implemented teaming system is single system and so it has each merits and demerits. That is to say, when we use the learning system through the Web, the demerit is only possible by the static states using computer. For those who do not use the computer, the demerit is that the user must learn the use of the new system. Also, the case of using telephone network has merits that one can use the system anyplace, anytime by the telephone. But it has the problem of not being able to transmit information very efficiently. From these, this paper proposes the learning system that can be used efficiently and conveniently anyplace, anytime by connecting both telephone network and web. Also, we propose a new algorithm of user ID, password and name registration function using teaming system using VoiceXML and individual learning progress save function using VoiceXML and web.

The Numerical Study on the Flow Control of Ammonia Injection According to the Inlet NOx Distribution in the DeNOx Facilities (탈질설비 내에서 입구유동 NOx 분포에 따른 AIG유동제어의 전산해석적 연구)

  • Seo, Deok-Cheol;Kim, Min-Kyu;Chung, Hee-Taeg
    • Clean Technology
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    • v.25 no.4
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    • pp.324-330
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    • 2019
  • The selective catalytic reduction system is a highly effective technique for the denitrification of the flue gases emitted from the industrial facilities. The distribution of mixing ratio between ammonia and nitrogen oxide at the inlet of the catalyst layers is important to the efficiency of the de-NOx process. In this study, computational analysis tools have been applied to improve the uniformity of NH3/NO molar ratio by controlling the flow rate of the ammonia injection nozzles according to the distribution pattern of the nitrogen oxide in the inlet flue gas. The root mean square of NH3/NO molar ratio was chosen as the optimization parameter while the design of experiment was used as the base of the optimization algorithm. As the inlet conditions, four (4) types of flow pattern were simulated; i.e. uniform, parabolic, upper-skewed, and random. The flow rate of the eight nozzles installed in the ammonia injection grid was adjusted to the inlet conditions. In order to solve the two-dimensional, steady, incompressible, and viscous flow fields, the commercial software ANSYS-FLUENT was used with the k-𝜖 turbulence model. The results showed that the improvement of the uniformity ranged between 9.58% and 80.0% according to the inlet flow pattern of the flue gas.

Analysis of BWIM Signal Variation Due to Different Vehicle Travelling Conditions Using Field Measurement and Numerical Analysis (수치해석 및 현장계측을 통한 차량주행조건에 따른 BWIM 신호 변화 분석)

  • Lee, Jung-Whee
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.24 no.1
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    • pp.79-85
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    • 2011
  • Bridge Weigh-in-Motion(BWIM) system calculates a travelling vehicle's weight without interruption of traffic flow by analyzing the signals that are acquired from various sensors installed in the bridge. BWIM system or data accumulated from the BWIM system can be utilized to development of updated live load model for highway bridge design, fatigue load model for estimation of remaining life of bridges, etc. Field test with moving trucks including various load cases should be performed to guarantee successful development of precise BWIM system. In this paper, a numerical simulation technique is adopted as an alternative or supplement to the vehicle traveling test that is indispensible but expensive in time and budget. The constructed numerical model is validated by comparison experimentally measured signal with numerically generated signal. Also vehicles with various dynamic characteristics and travelling conditions are considered in numerical simulation to investigate the variation of bridge responses. Considered parameters in the numerical study are vehicle velocity, natural frequency of the vehicle, height of entry bump, and lateral position of the vehicle. By analyzing the results, it is revealed that the lateral position and natural frequency of the vehicle should be considered to increase precision of developing BWIM system. Since generation of vehicle travelling signal by the numerical simulation technique costs much less than field test, a large number of test parameters can effectively be considered to validate the developed BWIM algorithm. Also, when artificial neural network technique is applied, voluminous data set required for training and testing of the neural network can be prepared by numerical generation. Consequently, proposed numerical simulation technique may contribute to improve precision and performance of BWIM systems.

Design and Performance Analysis of a DS/CDMA Multiuser Detection Algorithm in a Mixed Structure Form (혼합구조 형태의 DS/CDMA 다중사용자 검파 알고리즘 설계 및 성능 분석)

  • Lim, Jong-Min
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.3
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    • pp.51-58
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    • 2002
  • The conventional code division multiple access(CDMA) detector shows severe degradation in communication quality as the number of users increases due to multiple access interferences(MAI). This problem thus restricts the user capacity. Various multiuser detection algorithms have been proposed to overcome the MAI problem. The existing detectors can be generally classified into one of the two categories : linear multiuser detection and subtractive interference cancellation detectors. In the linear multiuser detection, a linear transform is applied to the soft outputs of the conventional detector. In the subtractive interference cancellation detection, estimates of the interference are generated and subtracted out from the received signal. There has been great interest in the family of the subtractive interference cancellation detection because the linear multiuser detection exhibits the disadvantage of taking matrix inversion operations. The successive interference cancellation (SIC) and the parallel interference cancellation (PIC) are the two most popular structures in the subtractive interference cancellation detector. The SIC structure is very simple in hardware complexity, but has the disadvantage of increased processing delay time, while the PIC structure is good in performance, but shows the disadvantage of increased hardware complexity. In this paper we propose a mixed structure form of SIC and PIC in order to achieve good performance as well as simple hardware complexity. A performance analysis of the proposed scheme has been made, and the superior characteristics of the mixed structure are demonstrated by extensive computer simulations. 

Cost-Effectiveness Analysis of Different Management Strategies for Detection CIN2+ of Women with Atypical Squamous Cells of Undetermined Significance (ASC-US) Pap Smear in Thailand

  • Tantitamit, Tanitra;Termrungruanglert, Wichai;Oranratanaphan, Shina;Niruthisard, Somchai;Tanbirojn, Patuou;Havanond, Piyalamporn
    • Asian Pacific Journal of Cancer Prevention
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    • v.16 no.16
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    • pp.6857-6862
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    • 2015
  • Background: To identify the optimal cost effective strategy for the management of women having ASC-US who attended at King Chulalongkorn Memorial Hospital (KMCH). Design: An Economical Analysis based on a retrospective study. Subject: The women who were referred to the gynecological department due to screening result of ASC-US at King Chulalongkorn Memorial Hospital, a general and tertiary referral center in Bangkok Thailand, from Jan 2008 - Dec 2012. Materials and Methods: A decision tree-based was constructed to evaluate the cost effectiveness of three follow up strategies in the management of ASC-US results: repeat cytology, triage with HPV testing and immediate colposcopy. Each ASC-US woman made the decision of each strategy after receiving all details about this algorithm, advantages and disadvantages of each strategy from a doctor. The model compared the incremental costs per case of high-grade cervical intraepithelial neoplasia (CIN2+) detected as measured by incremental cost-effectiveness ratio (ICER). Results: From the provider's perspective, immediate colposcopy is the least costly strategy and also the most effective option among the three follow up strategies. Compared with HPV triage, repeat cytology triage is less costly than HPV triage, whereas the latter provides a more effective option at an incremental cost-effectiveness ratio (ICER) of 56,048 Baht per additional case of CIN 2+ detected. From the patient's perspective, the least costly and least effective is repeat cytology triage. Repeat colposcopy has an incremental cost-effectiveness (ICER) of 2,500 Baht per additional case of CIN2+ detected when compared to colposcopy. From the sensitivity analysis, immediate colposcopy triage is no longer cost effective when the cost exceeds 2,250 Baht or the cost of cytology is less than 50 Baht (1USD = 31.58 THB). Conclusions: In women with ASC-US cytology, colposcopy is more cost-effective than repeat cytology or triage with HPV testing for both provider and patient perspectives.

Audio Quality Enhancement at a Low-bit Rate Perceptual Audio Coding (저비트율로 압축된 오디오의 음질 개선 방법)

  • 서정일;서진수;홍진우;강경옥
    • The Journal of the Acoustical Society of Korea
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    • v.21 no.6
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    • pp.566-575
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    • 2002
  • Low-titrate audio coding enables a number of Internet and mobile multimedia streaming service more efficiently. For the help of next-generation mobile telephone technologies and digital audio/video compression algorithm, we can enjoy the real-time multimedia contents on our mobile devices (cellular phone, PDA notebook, etc). But the limited available bandwidth of mobile communication network prohibits transmitting high-qualify AV contents. In addition, most bandwidth is assigned to transmit video contents. In this paper, we design a novel and simple method for reproducing high frequency components. The spectrum of high frequency components, which are lost by down-sampling, are modeled by the energy rate with low frequency band in Bark scale, and these values are multiplexed with conventional coded bitstream. At the decoder side, the high frequency components are reconstructed by duplicating with low frequency band spectrum at a rate of decoded energy rates. As a result of segmental SNR and MOS test, we convinced that our proposed method enhances the subjective sound quality only 10%∼20% additional bits. In addition, this proposed method can apply all kinds of frequency domain audio compression algorithms, such as MPEG-1/2, AAC, AC-3, and etc.

Study on Imputation Methods of Missing Real-Time Traffic Data (실시간 누락 교통자료의 대체기법에 관한 연구)

  • Jang Jin-hwan;Ryu Seung-ki;Moon Hak-yong;Byun Sang-cheal
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.3 no.1 s.4
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    • pp.45-52
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    • 2004
  • There are many cities installing ITS(Intelligent Transportation Systems) and running TMC(Trafnc Management Center) to improve mobility and safety of roadway transportation by providing roadway information to drivers. There are many devices in ITS which collect real-time traffic data. We can obtain many valuable traffic data from the devices. But it's impossible to avoid missing traffic data for many reasons such as roadway condition, adversary weather, communication shutdown and problems of the devices itself. We couldn't do any secondary process such as travel time forecasting and other transportation related research due to the missing data. If we use the traffic data to produce AADT and DHV, essential data in roadway planning and design, We might get skewed data that could make big loss. Therefore, He study have explored some imputation techniques such as heuristic methods, regression model, EM algorithm and time-series analysis for the missing traffic volume data using some evaluating indices such as MAPE, RMSE, and Inequality coefficient. We could get the best result from time-series model generating 5.0$\%$, 0.03 and 110 as MAPE, Inequality coefficient and RMSE, respectively. Other techniques produce a little different results, but the results were very encouraging.

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A small-area implementation of public-key cryptographic processor for 224-bit elliptic curves over prime field (224-비트 소수체 타원곡선을 지원하는 공개키 암호 프로세서의 저면적 구현)

  • Park, Byung-Gwan;Shin, Kyung-Wook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.6
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    • pp.1083-1091
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    • 2017
  • This paper describes a design of cryptographic processor supporting 224-bit elliptic curves over prime field defined by NIST. Scalar point multiplication that is a core arithmetic function in elliptic curve cryptography(ECC) was implemented by adopting the modified Montgomery ladder algorithm. In order to eliminate division operations that have high computational complexity, projective coordinate was used to implement point addition and point doubling operations, which uses addition, subtraction, multiplication and squaring operations over GF(p). The final result of the scalar point multiplication is converted to affine coordinate and the inverse operation is implemented using Fermat's little theorem. The ECC processor was verified by FPGA implementation using Virtex5 device. The ECC processor synthesized using a 0.18 um CMOS cell library occupies 2.7-Kbit RAM and 27,739 gate equivalents (GEs), and the estimated maximum clock frequency is 71 MHz. One scalar point multiplication takes 1,326,985 clock cycles resulting in the computation time of 18.7 msec at the maximum clock frequency.