• 전기학회논문지
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• 제58권5호
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• pp.982-988
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• 2009

In a surface type ac PDP having $200{\mu}m$ gap between the surface electrodes, the luminous efficacy has a reciprocal dependence on the sustaining frequency. The discharge current flowing to the address electrodes are measured to investigate the phenomena and spectral intensity from visible light to infra red is measured to verify phosphor saturation with the frequency. Experiments show the discharge between the address and surface electrodes deteriorates the efficacy in high sustaining frequencies. Pulse width modulation is introduced to improve the efficacy. In optimum conditions, we obtained 1.99lm/w and 1.79lm/w at 200kHz and 250kHz, respectively.

• 한국전기전자재료학회논문지
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• 제17권10호
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• pp.1120-1124
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• 2004

Recently, Plasma Display Panel(PDP) has been in the spotlight as one of the next generation flat-panel-display device. However, it has several drawbacks like the low contrast ratio and the low luminance. In this study, a new address waveform is suggested to improve the priming effect and contrast ratio at the address period in the Address Display period Separated(ADS) method. We modified waveform, instead of a conventional waveform, to an address period, for operating on the Plasma Display Panels, which used the conventional gas [He-Ne-Xe〕. When the ramp pulse is added to the address period at the sustain electrode, it is improved on the priming effect and contrast ratio.

• 전기학회논문지
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• 제56권3호
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• pp.577-582
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• 2007

The plasma display panel is an image expression display using gas discharge plasma. However, gas discharge characteristics vary with temperature as gas discharge is sensitive to temperature. The discharge time lag extends a lot in low temperature and it is known as the cause which hinders high speed addressing which is essential for the size enlargement of the panel. Accordingly this research aims at identifying the temperature-dependent discharge characteristic. The lower temperature becomes, the longer addressing discharge time lag becomes. Particularly the statistical time lag extends much in low temperature. The increasing of electric field shortens discharge time lag in low temperature. Also, when priming particles are sufficiently supplied, stable discharge can be performed regardless of the influence of temperature.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.585-588
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• 2007

We studied the effect of self-erase discharge on the luminous efficacy of ac PDPs. We observed through discharge current analysis to confirm that the selferase discharge occurred mainly between sustain cathode and address electrode, which have an influence on the luminous efficacy. The amount and timing of the self-erase discharge was varied to observe its effect on the luminous efficacy. It has been found that the luminous efficacy could be improved by the self-erase discharge when it is adjusted to occur right before the main discharge in the small gap structure. In the long gap structure, on the contrary, the luminous efficacy could be increased when the self-erase discharge is suppressed. Also, various waveforms to control self-erase discharge are suggested and tested in the panel experiments.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 C
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• pp.1830-1833
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• 2000

The relationships between driving voltage and the wall charge distribution in the address period of surface discharge type AC Plasma Display Panel have been investigated. The quantity of wall charge on each electrode are detected simultaneously from the electrode current after applying only one addressing discharge pulse. The wall charge Qy on the scan electrode Y is nearly the sum of Qx on the address electrode X and Qz on the sustain electrode 2. The Qy increased with the driving voltage regardless of the kind of electrode, whereas the address time Td decreased, Qz and Qy are increased considerably with the blocking voltage Vz, whereas Qx is decreased. The increase rate of Qx, Qy and Qz for increase in Vz was $-13{\times}10^{-2}$(pc/Vz), and $60{\times}10^{-2}$(pc/Vz) and $70{\times}10^{-2}$(pc/Vz), respectively.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.726-729
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• 2003

A new driving method is proposed to reduce the address period. The scan time of new driving method overlaps with the next scan time during the discharge lag time. Thus, without reducing the address pulse width and the scan pulse width, the new addressing method can reduce the address period. The results show that the scan time of about 100ns ${\sim}$ 300ns can be overlapped without the misfiring,.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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• pp.601-604
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• 2007

In this paper, we report the wall voltage transfer characteristic between sustain electrodes according to the address bias voltage in a 3-electrodes surface discharge type ac PDP by the VT close curve measurement technique. The result shows the change of wall voltage according to the gap voltage variation depends on the address bias voltage.

• KIEE International Transactions on Electrophysics and Applications
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• 제5C권5호
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• pp.183-190
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• 2005

In order to drive the high-density plasma displays, a high-speed driving technology must be researched. In this experiment, the relationship between the width of the address electrode and high-speed driving is analyzed using the Vt close curve and the panel structure for high-speed driving is proposed. In addition we show that the wider the width of the address electrode is, the narrower the width of the scan pulse becomes. Therefore, we could achieve the minimum data voltage of 50.1V at a scan pulse width of $1.0/{\mu}s$ and a ramp voltage of 210V at an address electrode width of $180/{\mu}m$ for the high-speed driving 4-inch test PDP.

• Journal of Information Display
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• 제1권1호
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• pp.42-47
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• 2000

The relationship between driving voltage and the amount of wall charge in the address period of surface discharge type AC Plasma Display Panel has been investigated. The amount of wall charge on each electrode is obtained simultaneously from the current profiles after applying only one addressing discharge pulse. The wall charge $Q_y$ on the scan electrode Y is almost the sum of $Q_x$ on the address electrode X and $Q_z$ on the sustain electrode Z. The $Q_y$ increased with the driving voltage regardless of the kind of electrode, whereas the addressing $T_d$ decreased. The $Q_x$ and $Q_y$ are increased considerably by blocking voltage $V_z$, whereas $Q_x$ is decreased. The $V_z$ dependence of $Q_x$ $Q_y$ and ${\varrho}_z$ in addressing discharge was $-13{\times}10^{-2}$ (pc/$V_z$), and $60{\times}10^{-2}$ ($pc/V_z$) and $70{\times}10^{-2}(pc/V_z)$, respectively.

• 조명전기설비학회논문지
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• 제21권8호
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• pp.27-33
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• 2007

램프(ramp) 파형의 프라이밍 펄스를 표시방전 유지기간에 중첩시켜 인가함으로써, 단일 구동회로를 사용하여 플라즈마 디스플레이 패널(PDP)의 전체를 동시에 방전시킬 수 있는 새로운 프라이밍(priming) 방전기술을 고안하였다. 실험결과로부터 표시방전이 없는 화소에만 프라이밍 방전이 일어남을 확인하였으며 표시방전은 프라이밍 펄스의 영향을 거의 받지 않는다는 것을 알았다. 또한 제안된 프라이밍 방전 기술을 적용한 구동방식을 사용하여 0.7 [${\mu}s$]의 어드레스 펄스폭을 가지는 고속 구동을 실현하였고 40[V]의 넓은 어드레스 전압 범위를 얻었다. 이 결과는 1080개의 수평주사선수를 가지는 full-HDTV PDP를 밝기의 감소 없이 구동할 수 있으며 이 기술은 상용의 구동IC를 사용할 수 있도록 설계되었으므로 상용화 가능성도 높다.