• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.364-367
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• 2012

In this paper, AXI4 BUS was implemented using Verilator and C/C++ for verification of SoC platform H/W IP which is based on AXI4 BUS. In this paper we proposed a method to verify the AXI4 BUS based SoC platform H / W IP by implemented AXI4 BUS on PC using Verilator and C/C++. The result shows AXI4 BUS based H/W IP that is verified by implemented AXI4 BUS is to perform the same behavior on FPGA environment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2011.05a
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• pp.712-713
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• 2011

In this paper, the AMBA AXI slave unit that can verify the pipelined arithmetic unit is proposed and the 2-stage 16-bit pipelined multiplier is introduced as design example. The proposed AXI slave unit consists of input buffer block memory, control registers, pipelined arithmetic unit, control unit, output buffer block memory, and AXI slave interface unit. The main operational procedures are divided into the following steps, such as burst-mode input data loading for the input buffer memory, programming of control registers, arithmetic operations for block data in the input buffer memory, and burst-mode output data unloading from output buffer memory to host processor. Because the proposed AXI slave unit is general structure, it can be efficiently applicable to AMBA AXI and AHB slave unit with pipelined arithmetic unit.

• Journal of Welding and Joining
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• v.28 no.2
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• pp.60-65
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• 2010

Although two dimensional axi-symmetric modeling is useful for calculating the residual stresses of a cylindrical weldment such as a core barrel, this conventional axi-symmetric modeling can not express the behavior of shrinkage well in the locally heated weld zone. New technique of two dimensional axi-symmetric modeling using a virtual fixture is suggested to simulate the behavior of dimensional changes in the weld zone during the heating period of the welding. The virtual fixture in the model has a role to restrain the expansion of the high temperature heated region, which simulates equivalent intrinsic restraint effect of the weldment. In the restraint condition of the virtual fixture above the critical yield strength, the calculated shrinkages by using the suggested axi-symmetric model agreed well with those measured in a welded mock-up. The calculated residual stresses by using the suggested axi-symmetric model also agreed well with those calculated by using conventional axi-symmetric model which has beenused for calculating residual stresses in the weldment.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.869-872
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• 2005

In this paper we present a switch wrapper for an AMBA AXI, which is an efficient on-chip-network interface compared to bus-based interfaces in a multiprocessor SoC. The AXI uses an idea of NoC to provide the increasing demands on communication bandwidth within a single chip. A switch wrapper for AXI is located between a interconnection network and two IPs connecting them together. It carries out a mode of routing to interconnection network and executes protocol conversions to provide compatibility in IP reuse. A switch wrapper consists of a direct router, AHB-AXI converters, interface modules and a controller modules. We propose the design of a all-in-one type switch wrapper.

• Journal of the Institute of Convergence Signal Processing
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• v.15 no.2
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• pp.70-75
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• 2014

Recently, the demand for high-integrated, low-powered, and high-powered SoC design has been increasing due to the multi-functionality and the miniaturization of digital devices and the high capacity of service informations. With the rapid evolution of the system, the required hardware performances have become diversified, the FPGA system has been increasingly adopted for the rapid verification, and SoC system using the FPGA and the ARM core for control has been growingly chosen. While the AXI bus is used in these kinds of systems in various ways, it is traditionally designed with AXI slave structure. In slave structure, there are problems with the CPU resources because CPU is continually involved in the data transfer and can't be used in other jobs, and with the decreased transmission efficiency because the time not used of AXI bus beomes longer. In this paper, an efficient AXI master interface is proposed to solve this problem. The simulation results show that the proposed system achieves reductions in the consumption clock by an average of 51.99% and in the slice by 31% and that the maximum operating frequency is increased to 107.84MHz by about 140%.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.987-989
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• 2005

Axi-periodic analysis using magnetic vector potential is formulated in time harmonic field and applied to the field analysis for the end region of large turbo generator in this paper. By using axi-periodic analysis, the effect of flux shield, one of the structure placed in the end region of large turbo generator to prevent stator end from thermal damage, is studied, and eddy current loss in the flux shield is estimated for operation conditions. 3D FEA is used for the verification of presented analysis method. Because 3D flux distribution can be calculated with 2D modeling, magnetic field showing 3D distribution can be effectively calculated by axi-periodic analysis comparing with 3D FEA.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.1
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• pp.86-93
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• 2010

A system-on-chip (SoC) includes more functions and requires rapidly increased data bandwidth as the development of semiconductor process technology and SoC design methodology. As a result, the data bandwidth of on-chip-networks in SoCs becomes a key factor of the system performance, and the research on the on-chip-network is performed actively. Either AXI or OCP is considered to a substitute of the AHB which has been the most popular on-chip-network. However, they have much increased number of signal wires, which make it difficult to design the interface logic and the network hardware. The compatibility of the protocols with other protocols is not so good. In this paper, we propose a new interface protocol for on-chip-networks to improve the problems mentioned above. The proposed protocol uses less number of signal wires than that of the AHB and considers the compatibility with other interface protocols such as the AXI. According the analysis results, the performance of the proposed protocol per wire is much better than that of the AXI although the absolute performance is slightly inferior.

• International Journal of Fluid Machinery and Systems
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• v.3 no.1
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• pp.50-57
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• 2010

The attachment of inducer in front of main impeller is a powerful method to improve cavitation performance. Cavitation surge oscillation, however, often occurs at partial flow rate and extremely low suction pressure. As the cavitation surge oscillation with low frequency of about 10 Hz occurs in a close relation between the inlet backflow cavitation and the growth of blade cavity into the throat section of blade passage, one method of installing an axi-asymmetrical plate upstream of inducer has been proposed to suppress the oscillation. The inlet flow distortion due to the axi-asymmetrical plate makes different elongations of cavities on all blades, which prevent the flow from becoming simultaneously unstable at all throat sections. In the present study, changes of the suppression effects with the axial distance between the inducer inlet and the plate and the changes with the blockage ratios of plate area to the cross-sectional area of inducer inlet are investigated for helical inducers with tip blade angles of $8^{\circ}$ and $14^{\circ}$. Then a conceivable application will be proposed to suppress the cavitation surge oscillation by installing axi-asymmetrical inlet plate.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.24 no.10
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• pp.1326-1334
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• 2000

The oscillatory excitation with a Strouhal number of 2.65 ncar the stagnation zone of hemispherical nose model was employed to control the laminar separation bubble and the transition to turbulence. The effects of oscillatory excitation upon the separation bubble and the transition were addressed in terms of kurtosis/skewness and time-frequency analyses. The measured noise spectrum of radiated sound from the turbulent boundary layer on the axi-symmetric infinite cylinder is compared with that by Sevik's wave-number white approximations. The noise sources in TBL on axi-symmetric cylinder and the caling of their far-field sound are also discussed.

• Journal of the Korean Society for Industrial and Applied Mathematics
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• v.26 no.1
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• pp.67-75
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• 2022

Analysis of non-integer order thermoelastic temperature distribution and it's thermal deflection of thin hollow circular disk under the axi-symmetric heat supply is investigated. Initially, the disk is kept at zero temperature. For t > 0 the parametric surfaces are thermally insulated and axi-symmetric heat supply on the thickness of the disk. The governing heat conduction equation has been solved by integral transform technique, including Mittag-Leffler function. The results have been computed numerically and illustrated graphically with the help of PTC-Mathcad.