• Title/Summary/Keyword: AD 변환기

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Software Defined Radio를 위한 AD/DA 변환기의 기술 동향

  • 신원화;한건희
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.3
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    • pp.39-47
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    • 1999
  • This paper presents the survey of technical trend in AD converters for wireless communication systems. This paper provides explanations about the performance measure of ADC in wireless communication application and the relation ship between BER versus effective resolution and sampling speed. The survey suggests that at least one step analog frequency down conversion is required for software defined radio systems due to current technological limit.

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V/F Converter Design and Error Compensation of KSR-III Inertial Navigation System (과학로켓 관성항범장치의 V/F 변환기 설계 및 오차보상기법)

  • 김천중;조현철;노웅래;김동승
    • 제어로봇시스템학회:학술대회논문집
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    • 2000.10a
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    • pp.31-31
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    • 2000
  • In this paper, Ive design and test the V/F converter for KSR-III INS using commertial INC, VFC110, AD652. The test result shows that performance of AD652 is better than that of VFC110. Through the calibration of V/F converter, we show that the designed V/F converter has a good performance and is usable for KSR-III.

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A study on the real time simulation of continuous dynamic system using a multiprocessor (Multiprocessor를 이용한 연속 동특성계의 실시간 시뮬레이션에 관한 연구)

  • 곽병철;양해원
    • 제어로봇시스템학회:학술대회논문집
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    • 1986.10a
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    • pp.619-622
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    • 1986
  • 컴퓨터 기술의 발달에 따라 디지탈 전산기는 연산처리 능력이 더욱 빨라지고, 더욱 큰 기억용량을 갖게 되었다. 따라서 산업공정, 화학프랜트, 원자력발전 및 항공분야 등의 복잡한 연속 동특성계에 대한 실시간 시뮬레이션이 가능하게 되었다. 특히 복잡한 연속 동특성계의 시뮬레이션 목적으로 Multiprocessor 형태의 전산기가 개발되었다. 이 Multiprocessor형태의 전산기는 D/A 변환기와 A/D 변환기를 갖추므로써 실시간 실물 모의시험(A real time hardware-in-the-loop simulation) 시의 컴퓨터와 외부장비와의 데이타 전달이 용이하여 졌다. 본 연구에서는 비행체의 비행자세를 제어하기 위한 조종장치의 설계해석 및 성능시험을 위하여 Multiprocessor를 이용하여 실시간 실물 모의실험이 가능함을 보였다. 본 시뮬레이션에 사용된 전산기는 AD10 전산기이다.

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Multi-Channel AD Converters with High-Resolution and Low-Speed (고정밀 저속 다중채널 아날로그-디지털 변환기)

  • Bae, Sung-Hwan;Lee, Chang-Ki
    • The Journal of the Korea institute of electronic communication sciences
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    • v.3 no.3
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    • pp.165-169
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    • 2008
  • Analog-to-Digital converters (ADCs) used in instrumentation and measurements often require high absolute accuracy, including excellent linearity and negligible dc offset. Incremental converters provide a solution for such measurement applications, as they retain most of the advantages of conventional ${\Delta}{\Sigma}$ converters, and yet they are capable of offset-free and accurate conversion. Most of the previous research on incremental converters was for single-channel and dc signal applications, where they can perform extremely accurate data conversion with more than 20-bit resolution. In this paper, a design technique for implementing multiplexed incremental data converters to convert narrow bandwidth ac signals is discussed. A design methodology to optimize the signal-to-quantization+thermal noise ratio of multiplexed IDC is presented. It incorporates the operation principle, topology, and digital decimation filter design. The theoretical results are verified by simulation results.

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A study on the design exploration of Optical Image Stabilization (OIS) for Smart phone (스마트폰을 위한 광학식 손떨림 보정 설계 탐색에 관한 연구)

  • Lee, Seung-Kwon;Kong, Jin-Hyeung
    • Journal of Digital Contents Society
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    • v.19 no.8
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    • pp.1603-1615
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    • 2018
  • In order to achieve the low complexity and area, power in the design of Optical Image Stabilization (OIS) suitable for the smart phone, this paper presents the following design explorations, such as; optimization of gyroscope sampling rate, simple and accurate gyroscope filters, and reduced operating frequency of motion compensation, optimized bit width in ADC and DAC, evaluation of noise effects due to PWM driving. In experiments of gyroscope sampling frequencies, it is found that error values are unvaried in the frequency above 5KHz. The gyroscope filter is efficiently designed by combining the Fuzzy algorithm, to illustrate the reasonable compensation for the angle and phase errors. Further, in the PWM design, the power consumption of 2MHz driving is shown to decrease up to 50% with respect to the linear driving, and the imaging noises are reduced in the driving frequency above 2MHz driving frequency. The operating frequency could be reduced to 5KHz in controller and 10KHz in driver, respectively, in the motion compensation. For ADC and DAC, the optimized exploration experiments verify the minimum bit width of 11bits in ADC as well as 10bits in DAC without the performance degradation.

The tilt sensing system using serial communication (시리얼 통신을 이용한 기울기 감지 센싱 시스템)

  • Park, Jin-won;Lee, Hong-min
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.2 no.4
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    • pp.53-58
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    • 2009
  • In recently years, the research and application for sensor has increased in each field. In this paper, the system which can perceive and detect using 3-axis accelerometer sensor and serial communication is proposed. Also, the user has GUI environment for monitor in real-time. In order to reduce unstable data and error defect of electronic rechargeable liquid tilt sensor used digital 3-axis accelerometer sensor which has AD convertor. Therefore, this system provide exact data and a problem of objects for user more easier.

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Development of a hybrid sensor chip for power line phase measurement (전력선 위상 측정을 위한 하이브리드 센서 칩 개발)

  • Kim, Byoung-Il;Hong, Keun-Pyo;Hwang, Jin-Yong;Ahn, Byoung-Sun;Chang, Tae-Gyu
    • Proceedings of the KIEE Conference
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    • 2005.10b
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    • pp.436-438
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    • 2005
  • 본 논문에서는 전력선 위상 측정을 위해 A/D 변환기 및 위상계측 연산장치를 집적한 하이브리드 센서칩의 구현 기법을 제시하였다. 개발한 위상계측 연산장치는 recursive sliding-DFT에 기반하였으며 곱셈기의 시분할 공유 구조를 사용하여 칩의 구현 면적을 최소화 하였다. 60Hz의 전력선 신호를 중심주파수로 하는 AD 변환장치는 sigma-delta ADC를 기반으로 하여 8-bit 정밀도를 제공하며 아날로그부의 구현을 최소화하도륵 설계하였다. 설계한 하이브리드 센서칩은 컴퓨터 시뮬레이션 및 FPGA 구현을 통해 동작을 검증하였으며, 검증 완료후 $0.35{\mu}m$ CMOS 공정기술로 구현하였다. 전력선 위상을 측정하기 위해 구현된 4채널 하이브리드 센서 칩의 설계면적은 $5{\times}5m^2$ 의 약 20%정도를 차지하였다.

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Network-based Digital Crossover for Active Speakers (능동스피커를 위한 네트워크기반 디지털 크로스오버)

  • Kim, Byun-Gon;Kim, Kwan-Woong;Kim, Dae-Ik
    • The Journal of the Korea institute of electronic communication sciences
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    • v.10 no.2
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    • pp.227-232
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    • 2015
  • Nowadays, there are many innovative products in the pro-audio market thanks to advanced IT technology, DSP is very important technology to process high quality audio signal in SR(Sound Reinforcement) system. Digital audio technology that converged with IT technology can give new user-experience. In this paper, we present a new digital crossover system for active speakers using DSP and network technology. The prototype of crossover module consists of various audio process module such as filters, delay, phase controls and also it provides user to remote monitoring and remote control features by internet connection.

Design of RF Front-end for High Precision GNSS Receiver (고정밀 위성항법 수신기용 RF 수신단 설계)

  • Chang, Dong-Pil;Yom, In-Bok;Lee, Sang-Uk
    • Journal of Satellite, Information and Communications
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    • v.2 no.2
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    • pp.64-68
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    • 2007
  • This paper describes the development of RF front.end equipment of a wide band high precision satellite navigation receiver to be able to receive the currently available GPS navigation signal and the GALILEO navigation signal to be developed in Europe in the near future. The wide band satellite navigation receiver with high precision performance is composed of L - band antenna, RF/IF converters for multi - band navigation signals, and high performance baseband processor. The L - band satellite navigation antenna is able to be received the signals in the range from 1.1 GHz to 1.6 GHz and from the navigation satellite positioned near the horizon. The navigation signal of GALILEO navigation satellite consists of L1, E5, and E6 band with signal bandwidth more than 20 MHz which is wider than GPS signal. Due to the wide band navigation signal, the IF frequency and signal processing speed should be increased. The RF/IF converter has been designed with the single stage downconversion structure, and the IF frequency of 140 MHz has been derived from considering the maximum signal bandwidth and the sampling frequency of 112 MHz to be used in ADC circuit. The final output of RF/IF converter is a digital IF signal which is generated from signal processing of the AD converter from the IF signal. The developed RF front - end has the C/N0 performance over 40dB - Hz for the - 130dBm input signal power and includes the automatic gain control circuits to provide the dynamic range over 40dB.

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Improvement of VSWR Measurement for Various Modulated Signals at 1.8 GHz Band (다양한 변조 신호의 1.8 GHz 대역 VSWR 측정 개선에 관한 연구)

  • Park, Sang-Jin;Kang, Sung-Min;Koo, Kyung-Heon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.9
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    • pp.833-839
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    • 2011
  • This paper has suggested a technique for measuring VSWR at 1.8 GHz band for various modulated signals. By using directional coupler the power of incident and reflected wave is measured, and in order to minimize the size and cost of the measuring circuit, a SPDT(Single Pole Double Throw) switch is adopted to realize the circuit with just one detector and one A/D(Analog to Digital) converter. MCU(Micro Control Unit) is used to calculate the voltage reflection coefficient and VSWR, and the measured VSWR error has improved by approximately 0.2 with applying a simple bubble sorting algorithm to reduce the measurement error, the MCU process time and load.