• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.11 s.102
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• pp.1106-1113
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• 2005

This paper presents a dual-band mixer for multi-standards of IEEE 802.1la/b/g using a single local oscillator, so as to improve the defects of legacy systems. Those systems have duplicate local oscillators and mixers to handle dual band signals, increasing complexity of system and power loss. The proposed circuit shows 11.6 dB, 16.8 dB of conversion loss and 8.77 dBm, 12.5 dBm of IIP3(Input 3rd Intercept Point) for respective bands when the two RF inputs of 2.452 and 5.260 GHz are down-converted to the identical 356 MHz If frequency. The RF-LO isolations are measured 36 dB, 41 dB at each frequencies and over 50 dB of LO-IF isolations are achieved at all cases.

• 한국공간정보시스템학회:학술대회논문집
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• 2004.05a
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• pp.75-82
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• 2004

Many researcher's efforts have made a significant advancement of space frame structure with various portion, and it becomes the most outsanding one of space structures. However, with the characteristics of thin and long term of spacing, the unstable behavior of space structure is shown by initial imperfection, erection procedure or joint, especially space frame structure represents more. This kind of unstable problem could not be set up clearly and there is a huge difference between theory and experiment. Moreover, the discrete structure such as space frame has more complex solution, this it is not easy to derive the formulation of design about space structure. In this space frame structure, the character of rise-span ratio or load mode is represented by the instability of space frame structure with initial imperfection, and snap-through or bifurcation might be the main phenomenon. Therefore, in this study, space frame structure which has a lot of aesthetic effect and profitable for large space covering single layer is dealt. And because that the unstable behavior due to variation of inner force resistance in the elastic range is very important collapse mechanism, I would like to investigate unstable character as a nonlinear behavior with a geometric nonlinear. In order to study the instability. I derive tangent stiffness matrix using finite element method and with displacement incremental method perform nonlinear analysis of unit space structure, star dome and 3-ring star dome considering rise-span $ratio(\mu}$ and load $ratio(R_L)$ for analyzing unstable phenomenon.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.4 s.346
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• pp.49-55
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• 2006

In this paper, a fault dictionary for fault locations is considered. The foremost problem in fault diagnosis is the size of the data. As circuits are large, the data for fault diagnosis increase to the point where they are impossible to be stored. The increased information makes it impossible to store the dictionary into storage media. In order to generate the dictionary, j.e. pass-fail dictionary some dictionaries store a portion of the information. The deleted data makes it difficult to diagnose fault models except single stuck-at fault. This paper proposes a new dictionary format. A new format makes a dictionary small size without deleting any informations.

• Investigative Magnetic Resonance Imaging
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• v.24 no.3
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• pp.95-122
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• 2020

In this article, we evaluated the performance of radiofrequency (RF) coils in terms of the signal-to-noise ratio (S/N) and homogeneity of magnetic resonance images when used for ultrahigh-frequency (UHF) 7T magnetic resonance imaging (MRI). High-quality MRI can be obtained when these two basic requirements are met. However, because of the dielectric effect, 7T magnetic resonance imaging still produces essentially a non-uniform magnetic flux (|B₁|) density distribution. In general, heterogeneous and homogeneous RF coils may be designed using electromagnetic (EM) modeling. Heterogeneous coils, which are surface coils, are used in consideration of scalability in the |B₁| region with a high S/N as multichannel loop coils rather than selecting a single loop. Loop coils are considered state of the art for their simplicity yet effective |B₁|-field distribution and intensity. In addition, combining multiple loop coils allows phase arrays (PA). PA coils have gained great interest for use in receiving signals because of parallel imaging (PI) techniques, such as sensitivity encoding (SENSE) and generalized autocalibrating partial parallel acquisition (GRAPPA), which drastically reduce the acquisition time. With the introduction of a parallel transmit coil (pTx) system, a form of transceiver loop arrays has also been proposed. In this article, we discussed the applications and proposed designs of loop coils. RF homogeneous coils for volume imaging include Alderman-Grant resonators, birdcage coils, saddle coils, traveling wave coils, transmission line arrays, composite right-/left-handed arrays, and fusion coils. In this article, we also discussed the basic operation, design, and applications of these coils.

• Information and Communications Magazine
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• v.9 no.9
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• pp.72-85
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• 1992

The throughput requirement for many digital signal processing is such that multiple processing units are essential for real-time implementation. Advances in VLSI technology make it feasible to design and implement computer systems consisting of a large number of function units. The research on a very high throughput VLSI architecture for digital signal processing applications requires the development of an algorithm, decomposition scheme which can minimize data communication requirements as well as minimize computational complexity. The objectives of the research are to investigate computationally efficient algorithms for solution of the class of problems which can be modeled as DLSI systems or adaptive system, and develop VLSI architectures and associated multiprocessor systems which can be used to implement these algorithms in real-time. A new VLSI architecture for real-time 2-D digital signal processing applications is proposed in this research. This VLSI architecture extends the concept of having a single processing units in a chip. Because this VLSI architecture has the advantage that the complexity and the number of computations per input does not increase as the size of the input data in increased, it can process very large 2-D date in near real-time.

• Transactions on Electrical and Electronic Materials
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• v.3 no.1
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• pp.30-37
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• 2002

A focusing grating coupler (FGC) was not fabricated by the 'Continuous Path Control'writing strategy but by an electron-beam lithography system of more general exposure mode, which matches not only the address grid with the grating period but also an integer multiple of the address grid resolution (5 nm). To more simplify the fabrication, we are able to reduce a process step without large decrease of pattern quality by excluding a conducting material or layer such as metal (Al, Cr, Au), which are deposited on top or bottom of an e-beam resist to prevent charge build-up during e-beam exposure. A grating pitch period and an aperture feature size of the FGC designed and fabricated by e-beam lithography and reactive ion etching were ranged over 384.3 nm to 448.2 nm, and 0.5 $\times$ 0.5 mm$^2$area, respectively. This fabrication method presented will reduce processing time and improve the grating quality by means of a consideration of the address grid resolution, grating direction, pitch size and shapes when exposing. Here our investigations concentrate on the design and efficient fabrication results of the FGC for coupling from slab waveguide to a spot in free space.

• Advances in nano research
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• v.13 no.2
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• pp.199-206
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• 2022

We present the high-brightness large-area 10.1" in-cell polarizer display panel integrated with a wire grid polarizer (WGP) and metal reflector, from the initial design to final system development in a commercially feasible level. We have modeled and developed the WGP architecture integrated with the metal reflector in a single in-cell layer, to achieve excellent polarization efficiency as well as brightness enhancement through the light recycling effect. After the optimization of key experimental parameters via Taguchi method, the roll nanoimprint lithography employing a flexible large-area tiled mold has been utilized to create the 90 nm-pitch polymer resist pattern with the 54.1 nm linewidth and 5.1 nm residual layer thickness. The 90 nm-pitch Al gratings with the 51.4 nm linewidth and 2150 Å height have been successfully fabricated after subsequent etch process, providing the in-cell WGPs with high optical performance in the entire visible light regime. Finally we have integrated the WGP in a commercial 10.1" display device and demonstrated its actual operation, exhibiting 1.24 times enhancement of brightness compared to a conventional film polarizer-based one, with the contrast ratio of 1,004:1. Polarization efficiency and transmittance of the developed WGPs in an in-cell polarizer panel achieve 99.995 % and 42.3 %, respectively.

• Journal of Advanced Navigation Technology
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• v.27 no.6
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• pp.865-870
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• 2023

Recently, accidents caused by black ice, a road freezing phenomenon caused by natural power, are increasing. Black ice is difficult to identify directly with the human eye and is more likely to misunderstand it as standing water, so there is a high accident rate caused by car sliding. To solve this problem, this paper presents a method of detecting black ice centered on LiDAR sensors. With a small, inexpensive, and high-accuracy light detection and ranging (LiDAR) sensor, the temperature and inclination angle are set differently to detect black ice and asphalt by setting different reflection angles of asphalt and black ice differently in temperatures and inclinations. The LIDARO carried out in the study points out that additional research and improvement are needed to increase accuracy, and through this, more reliable black ice detection methods can be suggested. This method suggests a method of detecting black ice through early system design research by preventing accidents caused by black ice in advance.

• Journal of Practical Engineering Education
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• v.14 no.2
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• pp.387-392
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• 2022

To participate in global carbon neutrality, the Korean government is also planning to carry out zero-energy building certification for all buildings by 2030 through the enforcement decree of the 'Green Building Support Act'. Accordingly, the government is providing various projects related to solar power generation, which are relatively close to life. In particular, roof-mounted photovoltaic power generation systems are attracting attention in terms of using unused space to produce energy without destroying the environment, but low power generation efficiency compared to other photovoltaic power generation facilities is pointed out as a disadvantage. Therefore, in this paper, to solve this problem, we propose an efficient solar panel angle variable system through research on the solar panel structure for single-axial solar tracking, and also consider the application environment of the roof-mounted solar power generation system. Suggests measures to prevent damage and secondary damage. In addition, it is judged that it is possible to control the solar panel based on ICT convergence and configure the accident prediction safety system to link the project-based education program.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.12
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• pp.61-70
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• 2007

The density of Memory has been increased by great challenge for memory technology. Therefore, elements of memory become more smaller than before and the sensitivity to faults increases. As a result of these changes, memory testing becomes more complex. In addition, as the number of storage elements per chip increases, the test cost becomes more remarkable as the cost per transistor drops. Recent development in system-on-chip (SOC) technology makes it possible to incorporate large embedded memories into a chip. However, it also complicates the test process, since usually the embedded memories cannot be controlled from the external environment. Proposed design doesn't need controls from outside environment, because it integrates into memory. In general, there are a variety of memory modules in SOC, and it is not possible to test all of them with a single algorithm. Thus, the proposed scheme supports the various memory testing process. Moreover, it is able to At-Speed test in a memory module. consequently, the proposed is more efficient in terms of test cost and test data to be applied.