• 한국마린엔지니어링학회:학술대회논문집
• /
• 한국마린엔지니어링학회 2005년도 전기학술대회논문집
• /
• pp.1022-1028
• /
• 2005

This paper is presented the analysis results and simulation results of cascaded H-bridge 7 level inverter with various modulation index. Stepped waveform having number of switching was used to eliminate harmonic components. Switching angles according to modulation index are calculated numerically. Therefore, 3 times of switching with 7 level topology and QWS(Quarter Wave Symmetry) could eliminate 5th and 7th harmonics. The harmonic characteristics are compared to those of space vector modulation method which known as common modulation method in industrial field. Stepped waveform method showed higher ability to reduce, especially lower order of harmonics.

• Journal of Power Electronics
• /
• 제16권1호
• /
• pp.173-181
• /
• 2016

In this paper, a new technique for harmonic optimization in cascaded H-bridge 7-level inverters is proposed. The suggested strategy is based on minimizing an objective function which simultaneously optimizes the converter utilization and Total Harmonic Distortion (THD). The Switch Utilization Ratio (SUR) is formulized for both the phase and line-line voltages of a 7-level inverter and is considered in the final objective functions. Based upon the SUR formula, utilization ratio enhancement will reduce the value of feeding DC links, which improves the efficiency and lifetime of the circuit components due to lower voltage stresses and losses. In order to achieve more effective solution in different modulation indices, it is assumed that the DC sources can be altered. Experimental validation is presented based on a three-phase 7-level inverter prototype.

• 전기학회논문지
• /
• 제56권4호
• /
• pp.705-715
• /
• 2007

Recently, the interest on power quality has been hot issue because the equipments cause voltage disturbance and have become more sensitive to the voltage disturbance. Additionally, the reseach on power electronic equipments applying to the high power has been increased. This paper deals with Line-Interactive Dynamic Voltage Restorer(LIDVR) system using 7-Level H-Bridge inverter, which is one of the solutions to compensate the voltage disturbance and to increase the power of equipments. The LIDVR has the following advantages comparing to the DVR with the series injection transformer. It has the power factor near to unity under the condition of normal source voltage, can compensate the harmonic current of the load and the instant interruption, and has the fast response. First, the construction, the operation mode and algebraic modeling of LIDVR are reviewed. And then the voltage control algorithm is proposed to get the sinusoidal load voltage with constant amplitude. Finally, simulation and experiment results verify the proposed LIDVR system.

• 전력전자학회논문지
• /
• 제8권6호
• /
• pp.478-487
• /
• 2003

본 논문에서는 고압 대용량 전동기 구동용 멀티레벨 인버터의 종류 및 특징을 간략히 살펴보고, 특히 입출력 전력품질이 우수하고 전압별 시리즈화가 용이한 H-브릿지 멀티레벨 인버터의 구조적 특징 및 장점을 기술하였다. 연구 개발된 3,300V lMVA 용량의 Cascaded H-브릿지 멀티레벨 인버터의 구체적인 전력회로 구조 및 설계방법, 제어기 구성 그리고 PWM 기법을 제시하였다. 또한, 실용량의 시험을 통해 H-브릿지 멀티레벨 인버터는 출력 전압 Step이 여러 단계이고 dv/dt가 적으며 입력단 THD를 크게 낮출 수 있어 성능 면에서도 여타 방식보다 우수함을 입증하였다. 또한 생산적인 측면에서도 저압 소자를 사용하여 설계하므로 기존의 생산/시험 기술과 설비를 이용할 수 있어 매우 경제적이며 Power Cell 단위 결합 구조이므로 신뢰성 측면이나 보수/유지 측면에서도 유리하다는 결론을 얻었다.

• 조명전기설비학회논문지
• /
• 제20권3호
• /
• pp.36-44
• /
• 2006

일반적으로 PWM인버터에 발생된 고조파와 노이즈는 스위칭 주파수, dv/dt와 di/dt, PWM 스위칭 방법에 의해 영향을 받는다. 멀티레벨 인버터가 고전력 시스템에 적용되어 낮은 주파수에서 동작할 때 이것은 큰 고조파 성분과 노이즈를 발생하게 된다. 따라서 멀티레벨 인버터에 출력 필터가 요구된다. 본 논문에서는 H-bridge 7레벨 인버터 시스템을 사용한 3상 유도 전동기 구동 시스템의 고조파와 노이즈 감소를 위해 출력 필터를 설계하였다. 가격이 저렴하고 간단한 구조를 가지며, 고조파와 노이즈를 효과적으로 감소시킬 수 있는 수동필터는 멀티레벨 인버터 시스템을 사용한 3상 유도전동기 구동시스템에 적용되었다. 설계된 시스템은 향상되었고, 시뮬레이션과 실험을 통해 그 타당성을 증명하였다.

• 전기학회논문지
• /
• 제67권2호
• /
• pp.209-215
• /
• 2018

This paper present a 7-level PWM inverter adopting voltage balancing control to series-connected input capacitors. The prior proposed 7-level PWM inverter consists of dc input source, three series-connected capacitors, two bidirectional switch modules, and an H-bridge. This circuit topology is useful to increase the number of output voltage levels, however it fails to generate 7-level in output voltage without consideration for voltage balancing among series-connected capacitors. Capacitor voltage imbalance is caused on the different period between charging and discharging of capacitor. To solve this problem, we uses the amplitude modulation of carrier wave, which is used to produce the center output voltage level. To verify the validity of the proposed control method, we carried out computer-aided simulation and experiments using a prototype.

• 한국조명전기설비학회:학술대회논문집
• /
• 한국조명전기설비학회 2005년도 춘계학술대회논문집
• /
• pp.47-50
• /
• 2005

In this paper, we investigate a filtering technique to reduce the adverse effect of long motor leads on H-bridge cascaded 7-level inverter fed ac motor drive. The switching surge voltage becomes the major cause to occur the insulation failure by serious voltage stress in the stator winding of high voltage induction motor. However, the effect of switching surge appears un seriousin high voltage induction motor than low voltage induction motor. Consequently, we demonstrated that the filter connected to the motor terminals greatly reduces the transient voltage stress and ringing, moreover we show lowers the dv/dt of the inverter switching pulse. The results of simulation show the suppression of dv/dt and the reduced peak voltage at the motor end of a long cable.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
• /
• pp.593-597
• /
• 2003

Multilevel power conversion technology has received increasing attention recently for high power applications. The converters with the technology are suitable for high voltage and high power applications due to their ability to synthesize waveforms with better harmonic spectrum and apply for the high voltage equipment with a limited voltage rating of device. In the family of multilevel inverters, the topologies based on cascaded H-bridges are particularly attractive because of their modularity and simplicity of control. This paper presents multilevel inverter with cascaded H-bridge for large-power motor drives. The main features of this drive 1) reduce harmonic injection 2) can generate near-sinusoidal voltages, 3) have almost no common-mode voltage; 4) are low dv/dt at output voltage; 5)do not generate significant over-voltage on motor terminal; The topology of the developed product is presented and the feasibility study of the inverter on 3300v 1MVA 7-level H-bridge type was tarried out with experiments.

• Journal of Power Electronics
• /
• 제17권1호
• /
• pp.222-231
• /
• 2017

In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

• Journal of Power Electronics
• /
• 제19권5호
• /
• pp.1074-1086
• /
• 2019

This paper presents the design and implementation of an improved cascaded multilevel inverter topology with asymmetric DC sources. This experimental inverter topology is a stand-alone system with simulations and experiments performed using resistance loads. The topology uses four asymmetric binary DC sources that are independent from each other and one H-bridge. The topology was simulated using PSIM software before an actual prototype circuit was tested. The proposed topology was shown to be very efficient. It was able to generate a smooth output waveform up to 31 levels with only eight switches. The obtained simulation and experimental results are almost identical. In a 1,200W ($48.3{\Omega}$) resistive load application, the THDv and efficiency of the topology were found to be 1.7% and 97%, respectively. In inductive load applications, the THDv values were 1.1% and 1.3% for an inductive load ($R=54{\Omega}$ dan L=146mH) and a 36W fluorescent lamp load with a capacitor connected at the dc bus.