1 |
K. K. Gupta and S. Jain, “A novel multilevel inverter based on switched DC sources,”IEEE Trans. Ind. Electron. Vol. 61, No.7, pp. 3269-3278, Jul. 2014.
DOI
|
2 |
B. Li, D. Xu, and D. Xu, “Circulating current harmonics suppression for modular multilevel converters based on repetitive control,” Journal of Power Electronics, Vol. 14, No.6, pp. 1100-1108, Nov. 2014.
DOI
|
3 |
N. Yousefpoor, S.H. Fathi, N. Farokhniaand, and H. A. Abyaneh, “THD minimization applied directly on the line-to-line voltage of multilevel inverters,” IEEE Trans. Ind. Electron. Vol. 59, No. 1, pp. 373-380, Jan. 2012.
DOI
|
4 |
P. Roshankumar, P. P. Rajeevan, K. Mathew, K. Gopakumar, J .I. Leon, and L. G. Franquelo,“A five-level inverter topology with single-DC supply by cascading a flying capacitor inverter and an H-bridge,” IEEE Trans. Power Electron., Vol. 27, No. 8, pp. 3505-3512, Aug. 2012.
DOI
|
5 |
H. Sepahvand, L. Jingsheng, M. Ferdowsi, and K.A. Corzine, “Capacitor voltage regulation in single-dc-source cascaded H-bridge multilevel converters using phase-shift modulation,” IEEE Trans. Ind. Electron. Vol. 60, No.9, pp. 3619-3626, Sep. 2013.
DOI
|
6 |
R. Kaarthik, K. Gopakumar, J. Mathew, and T. Undeland,“Medium-voltage drive for induction machine with multilevel dodecagonal voltage space vectors with symmetric triangles,” IEEE Trans. Ind. Electron. Vol. 62, No.1, pp. 79-87, Jan. 2015.
DOI
|
7 |
H. M. Pirouz and M. T. Bina, “Modular multilevel converter based STATCOM topology suitable for medium-voltage unbalanced systems,” Journal of Power Electronics, Vol. 10, No.5, pp. 572-578, Sep. 2010.
DOI
|
8 |
L. Haw, M. Dahidah, and H. Almurib, “SHE–PWM Cascaded Multilevel Inverter With Adjustable DC Voltage Levels Control for STATCOM Applications,” IEEE Trans. Power Electron.,Vol. 29, No.12, pp. 6433-6444, Dec. 2014.
DOI
|
9 |
N.K. Kumar and K. Sivakumar, “A quad two-level inverter configuration for four-pole induction-motor drive with single DC link,” IEEE Trans. Ind. Electron. Vol. 62, No.1, pp. 105-112, Jan. 2015.
DOI
|
10 |
J. Chivite-Zabalza, P. Izurza-Moreno, D. Madariaga, G. Calvo, and M. Rodríguez, “Voltage balancing control in 3-level neutral-point clamped inverters using triangular carrier PWM modulation for FACTS applications,” IEEE Trans. Power Electron., Vol. 28, No.10, pp. 4473-4484, Oct. 2013.
DOI
|
11 |
L. Yushan, B. Ge, H. Abu-Rub, and F. Peng, “An effective control method for three-phase quasi-z-source cascaded multilevel inverter based grid-tie photovoltaic power system,” IEEE Trans. Ind. Electron. Vol. 61, No.12, pp. 6794-6802, Dec. 2014.
DOI
|
12 |
C. Gu, H. S. Krishnamoorthy, P. N. Enjeti, Z. Zheng, and Y. Li, “A medium-voltage matrix converter topology for wind power conversion with medium frequency transformers,” Journal of Power Electronics, Vol.14, No.6, pp. 1166-1177, Nov. 2014.
DOI
|
13 |
R. Salehi, N. Farokhnia, M. Abedi, and S. H. Fathi, “Elimination of low order harmonics in multilevel inverters using genetic algorithm,” Journal of Power Electronics, Vol. 11, No. 2, pp. 132-139, Mar. 2011.
DOI
|
14 |
B. Jacob and M. R. Baiju, “A new space vector modulation scheme for multilevel inverters which directly vector quantize the reference space vector,” IEEE Trans. Ind. Electron. Vol. 62, No.1, pp. 88-95, Jan. 2015.
DOI
|
15 |
M. Malinowski, K. Gopakumar, J. Rodriguez, M. A. Pérez, “A survey on cascaded multilevel inverters,” IEEE Trans. Ind. Electron. Vol. 57, No.7, pp. 2197-2206, Jul. 2010.
DOI
|
16 |
C. Buccella, C. Cecati, M. G. Cimoroni, and K. Razi, “Analytical method for pattern generation in five-level cascaded H-bridge inverter using selective harmonic elimination,” IEEE Trans. Ind. Electron. Vol. 61, No. 11, pp. 5811-5819, Nov. 2014.
DOI
|
17 |
W. Jiang, W. Li, Z. Wu, Y. She, and Z. Tao, “Space-vector pulse-width modulation algorithm for multilevel voltage source inverters based on matrix transformation and including operation in the over-modulation region,” IETPower Electron., Vol. 7, No.12, pp. 2925-2933, Dec. 2014.
|
18 |
F. Filho, H. Z. Maia, T. H. A. Mateus, B. Ozpineci, L. M. Tolbert, and J. O. P. Pinto, “Adaptive selective harmonic minimization based on ANNs for cascade multilevel inverters with varying DC sources,” IEEE Trans. Ind. Electron. Vol. 60, No.5, pp.1955-1962, May 2013.
DOI
|
19 |
J. Napoles, A. J. Watson, J. J. Padilla, J. I. Leon, L. G. Franquelo, P. W. Wheeler, and M. A. Aguirre, “Selective harmonic mitigation technique for cascaded H-bridge converters with non-equal DC link voltages,” IEEE Trans. Ind. Electron. Vol. 60, No.5, pp. 1963-1971, May 2013.
DOI
|