• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.8 no.6
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• pp.515-519
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• 2015

In this paper, we suggested the novel monopole antenna for dual band characteristics by a linear monopole antenna combined with crossed planar monopole antenna. The target frequency is ISM(Industrial Scientific Medical) 2.45GHz/5.8GHz. The distinctive features of the proposed antenna in this paper is based on the slit in the surface of a crossed planar monopole for the dual band characteristics and the omnidirectional radiation patterns. The compact size of the proposed antenna is $36mm{\times}5.4mm{\times}5.4mm$. According to the simulation results, the bandwidth, the reflection coefficients below -10dB, of 2.45GHz and 5.8GHz are 150MHz and 1.43GHz, respectively. Consequently the proposed antenna structures is apply to the antenna for dual band characteristics.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.6 s.336
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• pp.59-66
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• 2005

CMOS LC VCO for tri-bind wireless LAN applications was designed in 1.8V 0.18$\mu$m CMOS process. PMOS transistors were chosen for VCO core to reduce flicker noise. The possible operation was verified for 5.8GHz band (5.725$\~$5.825GHz), 5.2GHz band (5.150$\~$5.325GHz), and 2.4GHz band (2.412$\~$2.484GHz) using the switchable L-C resonators. To linearize its frequency-voltage gain (Kvco), optimized multiple MOS varactor biasing technique was used for capacitance linearization and PLL stability improvement. VCO core consumed 2mA current and $570{\mu}m{\times}600{\mu}m$ die area. The phase noise was lower than -110dBc/Hz at 1MHz offset for tri-band frequencies.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.8
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• pp.42-50
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• 2007

This paper presents design methods for dual-frequency(2.4/5.8GHz) active receiving antennas. The proposed active receiving antennas are designed to interconnect the output port of a wideband antenna to the input port of an active device of High Electron Mobility Transistor directly and to receive RF signals of 2.4GHz and 5.2GHz simultaneously where the impedance matching conditions are optimized by adjusting the length of $1/20{\lambda}_0$(@5.8GHz) CPW transmission line in the planar antenna The bandwidth of implemented dual-frequency active receiving antennas is measured in the range of 2.0GHz to 3.1GHz and 5.25GHz to 5.9GHz. Gains are measured of 17.0dB at 2.4GHz and 15.0dB at 5.2GHz. The measured noise figure is 1.5dB at operating frequencies.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.9
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• pp.4101-4106
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• 2011

In this study, we propose that the structures of 2-layer spiral planar inductors have a lower spiral coil and via increasing inductance in limited possession are and confirm the frequency characteristics. The structures of inductors have Si thickness of $300{\mu}m$, $SiO_2$ thickness of $7{\mu}m$. The width of Cu coils and the space between segments have $20{\mu}m$, respectively. The number of turns of coils have 3. The performance of spiral planar inductors was simulated to frequency characteristics for inductance, quality-factor, SRF(Self- Resonance Frequency) using HFSS. The 2-layer spiral planar inductors have inductance of 3.2nH over the frequency range of 0.8 to 1.8 GHz, quality-factor of maximum 8.2 at 2.5 GHz, SRF of 5.8 GHz. Otherwise, 1-layer spiral planar inductors have inductance of 1.5nH over the frequency range of 0.8 to 1.8 GHz, quality-factor of maximum 18 at 8 GHz, SRF of 19.2 GHz.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.869-872
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• 2005

This paper presents a new switchable dual mode VCO(Voltage-Controlled Oscillator). The VCO is efficient in dual mode operation and has self-bias adjustment based on the operation frequencies of 2.4 GHz and 5 GHz. The switching is done using MOS transistors and tuning is done using MOS varactors. It is implemented using TSMC 0.18${\mu}$m CMOS technology. It is powered by 1.8V supply. The measured results showed that the overall tuning range is approximately 13% at 5 GHz and 8% at 2.4 GHz. The measured phase noise is approximately -102 dBc/Hz at 1 MHz offset for 5 GHz and -89 dBc/Hz at 600kHz offset for 2.4 GHz. The VCO showed tail currents of 2mA in 5GHz mode and 2.5mA in 2.4GHz mode from a 1.8 V supply, respectively.

• Journal of the Semiconductor & Display Technology
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• v.13 no.4
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• pp.59-63
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• 2014

Previous studies have selected wireless power transmission system using 2.45 GHz of ISM band, but the researches for 5.8 GHz microwave wireless power transmission have been relatively rare. The 5.8 GHz has some advantages compared with 2.45 GHz. Those are smaller antenna and smaller integrated system for RFIC. In this paper, the 5.8 GHz wireless power transmission system was developed and transmission efficiency was measured according to the distance. A transmitter sent the amplified microwaves through an antenna amplified by a power amplifier of 1W for 5.8 GHz, and a receiver was converted to DC from RF through a RF-DC Converter. In the 1W 5.8GHz wireless power transmission system, the converted currents and voltages were measured to evaluate transmission efficiency at each distance where LED lights up to 1m. The RF-DC Converter is designed and fabricated by impedance matching using full-wave rectifier circuit. The transmission-efficiency of the system shows from 1.05% at 0cm to 0.095% at 100cm by distance.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.71-72
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• 2013

In this paper, a design method for a compact slot antenna for 5.8 GHz RFID band (5.725-5.875 GHz) is studied. The proposed slot antenna is size-reduced by bending both ends of the straight slot in "${\Gamma}$"-shape, and a rectangular feed patch is located inside the slot. The effects of slot length, location of feed patch, and width and length of feed patch on the antenna performance are examined. A prototype antenna with optimized parameters for 5.8 GHz band is fabricated on an FR4 substrate and tested experimentally. The experimental results show that the frequency band for a VSWR < 3 ranges 5.72-6.13 GHz (bandwidth 410 MHz), and it corresponds fairly well with the simulated band 5.64-5.97 GHz (bandwidth 330 MHz). The fabricated antenna shows good radiation performance such as maximum power density in both directions normal to the slot plane, and low cross-polarization level of < -20 dB.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.12
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• pp.2763-2768
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• 2013

In this paper, a design method for a compact slot antenna for 5.8 GHz RFID band (5.725-5.875 GHz) is studied. The proposed slot antenna is size-reduced by bending both ends of the straight slot in "I"-shape, and a rectangular feed patch is located inside the slot. The effects of slot length, location of feed patch, and width and length of feed patch on the antenna performance are examined. A prototype antenna with optimized parameters for 5.8 GHz band is fabricated on an FR4 substrate and tested experimentally to verify the results of this study. The experimental results show that the frequency band for a VSWR < 3 ranges 5.72-6.13 GHz (bandwidth 410 MHz), and it corresponds fairly well with the simulated band 5.64-5.97 GHz (bandwidth 330 MHz). The fabricated antenna shows good radiation performance such as maximum power density in both directions normal to the slot plane, low cross-polarization level of < -20 dB, and realized gain > 0 dBi within the frequency band.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.304-308
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• 2003

A low cost solution employing harmonic oscillation to the frequency synthesizer at 5.8 GHz is proposed. The proposed frequency synthesizer is composed of 2.9GHz PLL chip, 2.9GHz oscillator, and 5.8GHz buffer amplifier. The measured data shows a frequency tuning range of 290MHz, ranging from 5.65 to 5.94GHz, about 0.5dBm of output power, and a phase noise of -107.67 dBc/Hz at the 100kHz offset frequency. All spurious signals including fundamental oscillation power (2.9GHz) are suppressed at least 15dBc than the desired second harmonic signal.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.45 no.2
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• pp.37-44
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• 2008

This paper presents a 5.8 GHz PLL using high-speed ring oscillator for WLAN. The proposed ring oscillator has been designed using the negative skewed delay scheme and for differential mode operation. Therefore, the oscillator is insensitive to power-supply-injected noise, and it has the merit of low 1/f noise because tail current sources are not used. The output frequency ranges from 5.13 to 7.04 GHz with the control voltage varing from 0 to 1.8 V. The proposed PLL circuits have been designed, simulated, and proved using 0.18 um 1.8 V TSMC CMOS library. At the operation frequency of 5.8 GHz, the locking time is 2.5 us and the simulated power consumption is 59.9 mW.