• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.203-206
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• 2000

This paper presents a torque ripple reduction technique of direct torque control(DTC) for high power induction motors driven by 3-level inverters with the inverter switching frequency limited around 0.5-1kHz level. It is noted that conventional DTC algorithms to reduce torque ripple are devised for applications with relatively high switching frequency above 2-3kHz. A new DTC algorithms especially for low switching frequency inverter system illustrates relatively reduced torque ripple are devised for applications with relatively high switching frequency above 2-3kHz. Anew DTC algorithm especially for low switching frequency inverter system illustrates relatively reduced torque ripple characteristics Simulation and experimental results show the effectiveness of the proposed control algorithm

• 대한전기학회논문지
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• 제39권2호
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• pp.157-163
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• 1990

The PWM inverter investigated in this paper utilizes a bridge type current sharing reactor circuit with tow pairs of complementary transistor at each phase. The driving signals for this inverter are 3 level PWM waves of W type an M type modulation, which are obtained from a microprocessor based on the switching time data obtained by switching position calculation of triangular and sine modulation wave. The output voltage waveforms of this inverter have 5 level phase voltage and 9 level line voltage of PWM. The harmonics of the output voltage are reduced to half when it is compared with single CTI, and the occurrence of harmonics is also reduced.

• KIEE International Transactions on Power Engineering
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• 제5A권1호
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• pp.22-30
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• 2005

The PWM inverter drive may cause an over voltage at the motor terminal, which imposes severe electric stresses on the inter-turn insulation of motor windings. Unlike low-voltage induction motors, high-voltage induction motors have a stator type of form-wound coil for insulation and are insulated to the slot and the coil. So, this paper presents a PWM 3-level inverter, H-Bridge cascaded 7-level inverter and High-voltage induction motor model. It then analyzes the voltage that generates at the input terminal of the high-voltage induction motor fed by each inverter. Also, in order to examine a factor that influences the switching surge voltage, this paper proposes the system equivalent model and performs the case studies using EMTP.

• 한국지능시스템학회논문지
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• 제16권5호
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• pp.627-634
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• 2006

CMOS 인버터 특성곡선의 기울기를 조절하는 방법과 y축으로 이동할 수 있는 방법을 제안하였다. 기울기의 변경과 y축으로 이동은 트랜지스터의 문턱 값을 조절하는 방법을 사용하였다. 그리고 특성곡선의 중심에서는 두 트랜지스터 모두 포화영역에 머물러 있음에 착안하여, 단극성 뉴런의 특성곡선을 만드는 방법을 제안하였다. 제안된 방법은 회로레벨의 시뮬레이션을 통해 검증하였으며, 회로레벨의 시뮬레이션은 OrCAD사의 PSpice(Professional Simulation Program with Integrated Circuit Emphasis)를 사용하였다.

• Journal of Electrical Engineering and Technology
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• 제12권5호
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• 전력전자학회논문지
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• 제12권5호
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• pp.424-431
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• 2007

본 논문은 발전소의 이차공기송풍기를 가변 회전수 제어하여 소내 소비 전력을 절감하고 전동기의 직입기동에 의한 스트레스를 줄이기 위하여 실증 적용된 200MW 석탄화력 발전소 순환 유동층 보일러 이차 공기 송풍기 구동용 H-브릿지 멀티레벨 인버터에 관한 것이다. H-브릿지 멀티레벨 인버터는 독립적으로 절연된 직류 부를 갖는 저전압의 단상 인버터(셀 인버터)를 다수 직렬 접속하여 고전압 3상 전압을 출력하는 Cascaded H-브릿지 전압형 인버터이다. 전력연구원은 6.6kV, 1MVA급 인버터 개발, 발전소에 설치, 보일러 점화 전/후 시험 및 계통 병입 후 부하 시험 등을 국내 최초로 성공적으로 완료하였다. 현재 200MW 석탄화력 발전소 이차 공기 송풍기 구동용 인버터는 상업 운전 중에 있다. 본 논문에서는 개발된 H-브릿지 멀티레벨 인버터, 기존 발전 설비와 신규 인버터 시스템의 인터페이스 부분에 해당하는 보일러 DCS(Distributed Control System : 분산 제어 시스템) 로직, 계통 병입 후 시운전 결과에 대하여 상세히 기술하였다.

• 전력전자학회논문지
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• 제25권4호
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• pp.319-328
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• 2020

The recent use of distributed power generation systems constructed with DC-DC converters has become extremely popular owing to the rising need for environment friendly energy generation power systems. In this study, a new single-phase five-level inverter for off-grid applications constructed with a multilevel DC-DC step-up converter is proposed to boost a low-level DC voltage (36 V-64 V) to a high-level DC bus (380 V) and invert and connect them with a single-phase 230 V rms AC load. Compared with other traditional multilevel inverters, the proposed five-level inverter has a reduced number of switching devices, can generate high-quality power with lower THD values, and has balanced voltage stress for DC capacitors. Moreover, the proposed topology does not require multiple DC sources. Finally, the performance of the proposed topology is presented through the simulation and experimental results of a 400 W hardware prototype.

• 한국정보통신학회논문지
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• 제6권3호
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• pp.421-426
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• 2002

Hybrid cascade multilevel PWM inverter has advantages of hybrid structure which enhances the better utilization of power semiconductor switches, that is, both hi호 power-low frequency switch, GTO and low power-high frequency switch, IGBT can be used in the same circuit. In this paper, a static var compensator using hybrid cascade 5-level PWM inverter is presented for high voltage/high power applications. The proposed system is modelled by circuit DQ transformation, and thus an equivalent circuit is obtained which reveals the important characteristics of the system and lead to the related equations. Finally, circuit structure and characteristics is presented and the validity of the characteristics analysis is shown through PSIM simulation.

• Journal of Power Electronics
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• 제19권4호
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• pp.989-999
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• 2019

This paper proposes a fault-tolerant control strategy with finite control set model predictive control (FCS-MPC) based on hierarchical optimization for five-level H-bridge neutral-point-clamped (5L-HNPC) inverter-fed induction motor drives. Fault-tolerant operation is analyzed, and the fault-tolerant control algorithm is improved. Adopting FCS-MPC based on hierarchical optimization, where the voltage is used as the controlled objective, called model predictive voltage control (MPVC), the postfault controller is simplified as a two layer control. The first layer is the voltage jump limit, and the second layer is the voltage following control, which adopts the optimal control strategy to ensure the current following performance and uniqueness of the optimal solution. Finally, simulation and experimental results verify that 5L-HNPC inverter-fed induction motor drives have strong fault tolerant capability and that the FCS-MPVC based on hierarchical optimization is feasible.

• Journal of Power Electronics
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• 제17권4호
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• pp.923-932
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• 2017

This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.