• Title/Summary/Keyword: 4-switch

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Analysis, Design and Development of a Single Switch Flyback Buck-Boost AC-DC Converter for Low Power Battery Charging Applications

  • Singh, Bhim;Chaturvedi, Ganesh Dutt
    • Journal of Power Electronics
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    • v.7 no.4
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    • pp.318-327
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    • 2007
  • The design and performance analysis of a power factor corrected (PFC), single-phase, single switch flyback buck-boost ac-dc converter is carried out for low power battery charging applications. The proposed configuration of the flyback buck-boost ac-dc converter consists of only one switch and operates in discontinuous current mode (DCM), resulting in simplicity in design and manufacturing and reduction in input current total harmonic distortion (THD). The design procedure of the flyback buck-boost ac-dc converter is presented for the battery charging application. To verify and investigate the design and performance, a simulation study of the flyback buck-boost converter in DCM is performed using the PSIM6.0 platform. A laboratory prototype of the proposed single switch flyback buck-boost ac-dc converter is developed and test results are presented to validate the design and developed model of the system.

A Design of ATM Firewall Switch using Cell Screening (셀 스크리닝 방식에 기반한 ATM Firewall Switch의 설계)

  • Hong, Seung-Seon;Jeong, Tae-Myeong;Park, Mi-Ryong;Lee, Jong-Hyeop
    • The KIPS Transactions:PartC
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    • v.8C no.4
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    • pp.389-396
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    • 2001
  • 기존의 라우터 기반의 패킷 스크리닝 방식은 ATM 네트워크 상에서는 패킷 수준의 스크리닝 기능의 적용을 위하여 SAR(Segmentation And Reassembly) 과정을 필요로 하기 때문에 고속의 셀 처리를 수행하는 ATM Switch의 셀 처리 속도를 저하시킨다는 문제점을 안고 있다. 본 논문에서는 셀 스크리닝 방식에 기반한 병렬 처리 구조의 ATM Firewall Switch를 제안한다. 제안된 Enhanced ATM Firewall Switch는 셀 단위로 분할된 패킷의 1, 2번 셀들에 대한 검사만을 통하여 스크리닝 기능을 수행하기 때문에 셀 단위의 스크리닝 수행이 가능하며, 정책 캐쉬의 도입을 통해 셀 스크리닝 수행속도를 향상하였다. 또한 독립적인 User Cells Filter 기능 블록의 설계를 통하여 병렬 처리 구조의 셀 스크리닝 수행이 가능하도록 구성하여 셀 지연 시간을 최소화하였다.

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Near Time Maximum Disturbance Design for Second Order Oscillator with Model Uncertainty (모델 불확실성을 갖는 이차 오실레이터에 대한 근사화된 최대 시간 교란 신호 설계)

  • You Kwan-Ho
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.52 no.4
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    • pp.205-211
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    • 2003
  • In this paper we propose a disturbance design method to test a system's stability. It is shown that the time maximum disturbance is represented in bang-bang and state feedback form. To maximize the time severity index, the value of disturbance is determined by the associated switch curve. The original switch curve is vulnerable to model uncertainties and takes much calculation time. We propose an improved method to approximate the original switch curve. This reduces the computational time and implements sufficiently to test the stable system. Simulation results show how the approximate switch curve can be used to stress a system by driving it to oscillation along the maximum limit cycle.

The behavior of a shared buffer ATM switch in a LAN environment (LAN 환경제어에서의 공유버퍼 ATM 스위치의 동작 특성)

  • 전병천;도미선;김영선
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.4
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    • pp.68-77
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    • 1996
  • In this paper, we investigate the effect of a LAN traffic on the performance of a shared buffer ATM switch andIWF (interworking function )on a LAN environment through simulations. Firstly, the delay and the buffer occupancy of the switch and IWF are mesured according to the proportion of the LAN traffic to the traffic generated by gernoulli process. Secondly, we investigate the behavior of the switch in the case that LAN traffic is concentrated to a connectionless server, and the effect of LAN traffic shaping at IWF on the delay and the buffer occupancy of the switch.

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A Novel Algorithm for Maintaining Packet Order in Two-Stage Switches

  • Zhang, Xiao Ning;Xu, Du;Li, Le Min
    • ETRI Journal
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    • v.27 no.4
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    • pp.469-472
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    • 2005
  • To enhance the scalability of high performance packet switches, a two-stage load-balanced switch has recently been introduced, in which each stage uses a deterministic sequence of configurations. The switch is simple to make scalable and has been proven to provide 100% throughput. However, the load-balanced switch may mis-sequence the packets. In this paper, we propose an algorithm called full frame stuff (FFS), which maintains packet order in the two-stage load-balanced switch and has excellent switching performance. This algorithm is distributed and each port can operate independently.

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A Cost Effective DC Link Variable Inverter Using 2-Switch Buck-Boost Converter (2-스위치 Buck-Boost 컨버터를 이용한 DC 링크 전압 가변형 인버터 설계)

  • Kang, Hyun-Soo;Kim, Jun-Hyung;Lee, Byoung-Kuk;Hur, Jin
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.5
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    • pp.950-959
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    • 2009
  • In this paper, a dc link voltage variable inverter system is proposed, which consists of a two-switch buck-boost converter and a four-switch inverter. In addition, as the current and torque ripples are generated by a voltage difference between back EMF and dc link voltage, these ripples could be reduced according to the controlled dc-link voltage according to the motor speed. The validity of the proposed inverter is verified by informative simulation and experimental results.

A study on ATM Switch supporting AAL Type 2 Cell processing (AAL Type 2 셀 처리를 지원하는 ATM 스위치에 관한 연구)

  • Park, Noh-Sik;Sonh, Seung-Il
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.3B
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    • pp.209-216
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    • 2003
  • In this paper, we propose ATM switch structure including AAL type 2 switch which can efficiently transmit low-bit rate data, even if the network has many endpoints. We simulate the architecture of ATM switch fabric that is modeled in computer program and analyze the performance according to offered loads. ATM switch proposed in this paper can support cell switching for all types of AAL cells which consist of AAL type 1, AAL type 2, AAL type 3/4, and AAL type 5 cells. We propose two switch fabric methods; One supports the AAL type 2 cell processing per input port, the other global AAL type 2 cell processing for every input port. The simulation results show that the latter is superior to the former. But the former has a merit for easy implementation and extensibility. The proposed ATM switch fabric is widely applicable to mobile communication, narrow band services over ATM network and wireless ATM as well as general ATM switching fabric.

A Low Insertion-Loss, High-Isolation Switch Based on Single Pole Double Throw for 2.4GHz BLE Applications

  • Truong, Thi Kim Nga;Lee, Dong-Soo;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.3
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    • pp.164-168
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    • 2016
  • A low insertion-loss, high-isolation switch based on single pole double throw (SPDT) for a 2.4GHz Bluetooth low-energy transceiver is presented in this paper. In order to increase isolation, the body floating technique is implemented. Based on characteristics whereby the ratio of the sizes of the shunt and the series transistors significantly affect the performance of the switches, the device sizes are optimized. A simple matching network is also designed to enhance the insertion loss. Thus, the SPDT switch has high isolation and low insertion loss without increasing the complexity of the circuit. The proposed SPDT is designed and simulated in a complementary metal-oxide semiconductor 65nm process. The switch has a $530{\mu}m{\times}270{\mu}m$ area and achieves 0.9dB, 1.78dB insertion loss and 40dB, 41dB isolation of transmission, reception modes, respectively.

Quad-Band Antenna Switch Module with Integrated Passive Device and Transistor Switch (수동 집적 회로 및 트랜지스터 스위치를 통한 4중 대역 안테나 스위치)

  • Jeong, In-Ho;Shin, Won-Chul;Hong, Chang-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.11
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    • pp.1287-1293
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    • 2008
  • Antenna switch module(ASM) for quad-band was developed. This module was integrated by RFIPD(RF integrated passive device) and transistor switch instead of LTCC-type device using low pass filters, diodes and passive elements in RF front end module for cellular phone. This module leads to low cost and miniaturization(The area is $5{\times}5\;mm$ and the thickness is 0.8 mm). The insertion loss and the return loss of each band were averagely measured as 1.0 dB(insertion loss), 15.1 dB(GSM/EGSM return loss) and 19 dB(DCS/PCS return loss), respectively.

Design of Low-Power and Low-Latency 256-Radix Crossbar Switch Using Hyper-X Network Topology

  • Baek, Seung-Heon;Jung, Sung-Youb;Kim, Jaeha
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.77-84
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    • 2015
  • This paper presents the design of a low-power, low area 256-radix 16-bit crossbar switch employing a 2D Hyper-X network topology. The Hyper-X crossbar switch realizes the high radix of 256 by hierarchically combining a set of 4-radix sub-switches and applies three modifications to the basic Hyper-X topology in order to mitigate the adverse scaling of power consumption and propagation delay with the increasing radix. For instance, by restricting the directions in which signals can be routed, by restricting the ports to which signals can be connected, and by replacing the column-wise routes with diagonal routes, the fanout of each circuit node can be substantially reduced from 256 to 4~8. The proposed 256-radix, 16-bit crossbar switch is designed in a 65 nm CMOS and occupies the total area of $0.93{\times}1.25mm^2$. The simulated worst-case delay and power dissipation are 641 ps and 13.01 W when operating at a 1.2 V supply and 1 GHz frequency. In comparison with the state-of-the-art designs, the proposed crossbar switch design achieves the best energy-delay efficiency of $2.203cycle/ns{\cdot}fJ{\cdot}{\lambda}2$.