• International Journal of Aerospace System Engineering
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• v.9 no.2
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• pp.1-9
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• 2022

The NEA release mechanism is used to provide restraint and release functions with low shock for critical deployment operations on solar arrays after launch. The GK3 solar array consists of 2 wings and 6 hold down points per panel. The NEA SSD9103S1 is a part of the GK3 solar array hold-down and release mechanism. Each NEA unit is equipped with two Z-diodes which provide power to a NEA unit connected in series after actuation of the fuse wire. This paper presents the hot firing test results of a quadrature NEA SSD9103S1 configuration. One output powers a maximum of 4 NEA SSD9103S1 units simultaneously. The necessary actuation pulse duration has been determined to meet margin requirement for thermal energy of minimum 4. Actuation thermal energy difference is about 6.6% between each half of two fired serial NEAs. Thermal energy margin at worst case is minimum 5.9 in case of an actuation pulse duration of 500 ms. Two series Zener impedance depend on current applied has been characterized by an additional actuation after all fuse wires are open circuit. Total number of actuation commands to the GK3 NEA unit reduce drastically from 24 in case of single NEA configuration down to 8 in case of parallel and quadrature NEA configurations. It can be accommodated by the existing HP2U Pyro design without any impact.

• Journal of Radiation Industry
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• v.6 no.1
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• pp.31-40
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• 2012

There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.11
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• pp.23-32
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• 2005

The automatic generation of circuit diagrams has been practically used in the HDL based design for decades. Nevertheless, the diagrams became too complicated for the designers to identify the signal flows in the RTL and system level designs. In this paper, we propose four techniques to enhance the roadability of the complicated diagrams. They include i) the transformation of repetitive instances and terminals into vector forms, ii) an improved loop breaking algorithm, iii) a flat tap which simplifies the two level bus ripping structure that is required for the connection of a bundle net to multiple buses, and iv) the identification of block strings, and alignment of the corresponding blocks. Towards validating the proposed techniques, the diagrams of an industrial strength design m generated. The complexity of the diagrams has been reduced by up to $90\%$ in terms of the number of wires, the aggregate wire length, and the area.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.17 no.6
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• pp.130-137
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• 2003

Because of falling-off in power quality by harmonics, obstacles like lowering of capability, noise, vibration of power facilities and so on are occurred. Also generation of harmonics is inevitable and the point at harmonics is seriously gathering strength because energy saving installation using semiconductor circuit as countermeasures to enhance energy efficiency will be broadly spread and the use of energy conversion equipment like motor speed control contrivance, energy keeping installation and so on will increase, in the future. In order to eliminate harmonics obstacle, precision measurement and analysis on voltage, current, power factor, the each ingredient of harmonic order, the percentage of total harmonic distortion, and so forth are needed. In this paper, we developed low-cost measurement system to measure and analyze power quality connected with harmonics and verified it's performance by measuring and analyzing power quality in the three-phase and four-wire system.

• Progress in Superconductivity
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• v.13 no.2
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• pp.105-110
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• 2011

SQUID sensor-based ultra low-field magnetic resonance apparatus with ${\mu}T$-level measurement field requires a strong prepolarization magnetic field ($B_p$) to magnetize its sample and obtain magnetic resonance signal with a high signal-to-noise ratio. This $B_p$ needs to be ramped down very quickly so that it does not interfere with signal acquisition which must take place before the sample magnetization relaxes off. A MOSFET switch-based $B_p$ coil driver has current ramp-down time ($t_{rd}$) that increases with $B_p$ current, which makes it unsuitable for driving high-field $B_p$ coil made of superconducting material. An energy cycling-type current driver has been developed for such a coil. This driver contains a storage capacitor inside a switch in IGBT-diode bridge configuration, which can manipulate how the capacitor is connected between the $B_p$ coil and its current source. The implemented circuit with 1.2 kV-tolerant devices was capable of driving 32 A current into a thick copper-wire solenoid $B_p$ coil with a 182 mm inner diameter, 0.23 H inductance, and 5.4 mT/A magnetic field-to-current ratio. The measured trd was 7.6 ms with a 160 ${\mu}F$ storage capacitor. trd was dependent only on the inductance of the coil and the capacitance of the driver capacitor. This driver is scalable to significantly higher current of superconducting $B_p$ coils without the $t_{rd}$ becoming unacceptably long with higher $B_p$ current.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.5
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• pp.44-51
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• 2009

In this paper, an air conditioner peak power control system using electric power line communication has been developed. The air conditioner power control system using RS-485 communication method is hard to install on the existing buildings due to difficulty in cabling, and the system using wireless communication methods has a weak point of not being able to be used in close space, while the developed system has its own advantages of overcoming the above mentioned obstacles. In addition, the system is extended to support not only single-phase electricity system but also three-phase four-wire electricity system, and therefore can be installed anywhere in the domestic environment. The system also has enhanced the ease of deployment, operational stability and economical efficiency by compact circuit design. Considering the current state requiring the energy sayings, the system would greatly contribute to the widespread use of the air conditioner power control system. The superiority in the performance and stability of the system has been proved by the design verification of each component such as remote air conditioner controller, electric power line gateway and so on, and the field test of the whole system.

• Journal of Biomedical Engineering Research
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• v.31 no.4
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• pp.292-301
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• 2010

To restore visual sensation of blind patients, we have proposed a fully implantable retinal prosthesis comprising an three dimensionally (3D) stacked retinal chip for transforming optical signal to electrical signal, a flexible cable with stimulus electrode array for stimulating retina cells, and coupling coils for power transmission. The 3D stacked retinal chip is consisted of several LSI chips such as photodetector, signal processing circuit, and stimulus current generator. They are vertically stacked and electrically connected using 3D integration technology. Our retinal prosthesis has a small size and lightweight with high resolution, therefore it could increase the patients` quality of life (QOL). For realizing the fully implantable retinal prosthesis, we developed a retinal prosthesis module comprising a retinal prosthesis chip and a flexible cable with stimulus electrode array for generating optimal stimulus current. In this study, we used a 2D retinal chip as a prototype retinal prosthesis chip. We fabricated the polymide-based flexible cable of $20{\mu}m$ thickness where 16 channels Pt stimulus electrode array was formed in the cable. Pt electrode has an impedance of $9.9k{\Omega}$ at 400Hz frequency. The retinal prosthesis chip was mounted on the flexible cable by an epoxy and electrically connected by Au wire. The retinal prosthesis chip was cappted by a silicone to pretect from corrosive environments in an eyeball. Then, the fabricated retinal prosthesis module was implanted into an eyeball of a rabbit. We successfully recorded electrically evoked potential (EEP) elicited from the rabbit brain by the current stimulation supplied from the implanted retinal prosthesis module. EEP amplitude was increased linearly with illumination intensity and irradiation time of incident light. The retinal prosthesis chip was well functioned after implanting into the eyeball of the rabbit.

• Journal of the Society of Naval Architects of Korea
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• v.35 no.4
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• pp.65-75
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• 1998

The $CO_2$ welding with 100% $CO_2$ gas is commonly used because of its cost and efficiency. Arc phenomena and spattering ratio of the $CO_2$ welding are influenced by various factors such as chemical compositions of welding wire, shielding gas, welding condition and welding power source etc.. Spattering ratio is predominantly influenced by the welding condition which determines a droplet transfer rode. In this study, arc phenomena and spattering ratio are investigated by using two type of FCW(titania type, semi-metal type). Then, the welding quality and optimum welding condition can be selected. From this study, the following results ware obtained; 1) In low current range(140A), FCW up to welding voltage(22V) resulted in a typical short circuit transfer, increase of spattering ratio and growth of spatter diameter. 2) In high current range(320A), the arc stability in titania FCW of a typical globular transfer is better than that of semi-metal FCW.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.11
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• pp.711-717
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• 2017

The railway is a public transportation system that provides large-scale passenger transportation and service, whose reliability and safety is the top priority. The wiring of railway vehicles is classified into train control lines (train lines) and communication lines. The train lines are used for input / output signals related to vehicle driving and safety functions, and the communication lines are used for the input / output signals for passenger services such as broadcasting. In order to measure the reliability of railway vehicles, a train line is applied to the input / output interface of the control signals between the electric control devices in the vehicle, and there are many electromechanical devices such as relays and contactors for the control logic. In fact, since the vehicle control circuit is composed of several thousand contacts, it is difficult to check for errors such as contact failure, and it is impossible to check the real-time status, so a lot of manpower and time is required for regular maintenance. Therefore, we analyze the current state of the train line design of the electric equipment used for driving and services in domestic railway cars and propose three wiring reduction methods to improve it. Based on the analysis of domestic electric vehicles, it was confirmed that the wiring reduction effect is 35% or more.

• The KIPS Transactions:PartA
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• v.11A no.2
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• pp.115-122
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• 2004

In this paper, the multiple-valued adders and multipliers are implemented by current-mode CMOS. First, we implement the 3-valued T-gate and the 4-valued T-gate using current-mode CMOS which have an effective availability of integrated circuit design. Second we implement the circuits to be realized 2-variable 3-valued addition table and multiplication table over finite fields $GF(3^2)$, and 2-variable 4-valued addition table and multiplication table over finite fields $GF(4^2)$ with the multiple-valued T-gates. Finally, these operation circuits are simulated under $1.5\mutextrm{m}$ CMOS standard technology, $15\mutextrm{A}$ unit current, and 3.3V VDD voltage Spice. The simulation results have shown the satisfying current characteristics. The 3-valued adder and multiplier, and the 4-valued adder and multiplier implemented by current-mode CMOS is simple and regular for wire routing and possesses the property of modularity with cell array. Also, since it is expansible for the addition and multiplication of two polynomials in the finite field with very large m, it is suitable for VLSI implementation.