• 제목/요약/키워드: 3D-offset

검색결과 449건 처리시간 0.021초

FDM 3D 프린팅의 경로생성을 위한 옵?루프의 꼬임제거 알고리즘 (An Algorithm for the Removing of Offset Loop Twists during the Tool Path Generation of FDM 3D Printer)

  • 올리올 이슬람;김호찬
    • 한국기계가공학회지
    • /
    • 제16권3호
    • /
    • pp.1-8
    • /
    • 2017
  • Tool path generation is a part of process planning in 3D printing. This is done before actual printing by a computer rather than an AM machine. The mesh geometry of the 3D model is sliced layer-by-layer along the Z-axis and tool paths are generated from the sliced layers. Each 2-dimensional layer can have two types of printing paths: (i) shell and (ii) infill. Shell paths are made of offset loops. During shell generation, twists can be produced in offset loops which will cause twisted tool paths. As a twisted tool path cannot be printed, it is necessary to remove these twists during process planning. In this research, An algorithm is presented to remove twists from the offset loops. To do so the path segments are traversed to identify twisted points. Outer offset loops are represented in the counter-clockwise segment order and clockwise rotation for the inner offset loop to decide which twisted loop should be removed. After testing practical 3D models, the proposed algorithm is verified to use in tool path generation for 3D printing.

Offset Self-Calibration 기법을 적용한 1.2V 7-bit 800MSPS Folding-Interpolation A/D 변환기의 설계 (Design of a 1.2V 7-bit 800MSPS Folding-Interpolation A/D Converter with Offset Self-Calibration)

  • 김대윤;문준호;송민규
    • 대한전자공학회논문지SD
    • /
    • 제47권3호
    • /
    • pp.18-27
    • /
    • 2010
  • 본 논문에서는 offset self-calibration 기법을 적용한 7-bit 1GSPS folding-interpolation A/D 변환기를 제안한다. 제안하는 A/D 변환기는 folding rate 2, interpolation rate 8의 1+6 구조로 고속 동작에 적합하게 설계되었다. 또한 offset self-calibration 회로를 설계하여 공정 mismatch, 기생 저항, 기생 캐패시턴스 등에 의한 offset-voltage의 변화를 감소시켜 A/D 변환기의 성능 특성을 향상 시켰다. 제안하는 A/D 변환기는 1.2V 65nm 1-poly 6-metal CMOS 공정을 사용하여 설계 되었으며 유효 칩 면적은 $0.87mm^2$, 1.2V 전원전압에서 약 110mW의 전력소모를 나타내었다. 측정 결과 샘플링 주파수 800MHz, 입력 주파수 250MHz에서 39.1dB의 SNDR 특성을 보여주었으며, offset self-calibration 회로를 사용 하지 않은 A/D 변환기에 비해 SNDR이 약 3 dB 향상되었다.

Shell Template Offset 도면을 활용한 선체 곡판 형상 복원 방법에 관한 연구 (A Study on the Method for Reconstructing the Shell Plates Surface from Shell Template Offset Drawing)

  • 황인혁;손승혁
    • 대한조선학회논문집
    • /
    • 제56권1호
    • /
    • pp.66-74
    • /
    • 2019
  • In the field of shipbuilding design, the use of 3D CAD is becoming commonplace, and most of the large shipyards are conducting 3D design. However at the production site, workers are still working on 2D drawings rather than 3D models. This tendency is even worse in small-scale shipyards and block manufacturing shops. Particularly, in a manufacturing shop that is engaged in the outsourcing of blocks, it may not be possible to provide 3D model. However, the demand for 3D models in the production field is steadily increasing. Therefore, it would be helpful if 3D model could be generated from a 2D drawing. In this paper, we propose a method to extract template and unfolded surface shape information from shell template offset drawing using computer vision technology. Also a 3D surface model was reconstructed and visualized from the extracted information. The result of this study is thought to be helpful in the work environment where 3D model information can not be obtained.

곡선 절개형 바지의 패턴사이즈 변형방법과 가상착의곡면3D (Methods to determine the size of pant patterns with curved design lines and their three dimensional construction using 3D virtual fitting)

  • 이희란
    • 패션비즈니스
    • /
    • 제20권4호
    • /
    • pp.153-171
    • /
    • 2016
  • With the advent of smart clothing for health care and sports, the sophisticated designs with curved seams are drawing attention. One of the problems in those clothing is to determine the design curves in 2D pattern, such that it corresponds to the lines on the intended 3D body. Moreover, the difficulty increases when the original pattern needs to be changed for various sizes and body types. We compare two methods of pattern enlargement in this paper: one is the offset/projection type, and the other is the split grading type. For the enlarged pattern with offset/projection type, the 3D surface offset was first adopted to transform the standard lower body to the target larger size; next, the design lines were projected to the new 3D surface, following which the 3D pattern was developed from the newly transformed 3D surface. In the second method, the enlarged pant patterns were developed by the split grading method. Here, a 3D pattern was developed from the initial body, and then enlarged to the target size by the conventional split grading method. Two feminine pants patterns were examined by 3D virtual fitting. We observed that the 3D offset/projection pants pattern was well fitted, having an evenly distributed surplus, as compared with the sample developed using the split grading method. The difference between the two patterns were apparent at the location where several curved lines merged.

Chip소자를 이용한 PLVCO의 설계 및 제작 (The Design Fabrication PLVCO Using Chip Element)

  • 하성재;이용덕;이근태;안창돈;홍의석
    • 한국통신학회논문지
    • /
    • 제26권12C호
    • /
    • pp.268-272
    • /
    • 2001
  • 본 논문에서는 24.42 GHz 전압제어 Hair-Pin 공진 발진기, 주파수 분주기, 완충 증폭기,-l0 dB 방향성 결합기, 위상 비교기를 이용하여 B-WLL용 PLVCO LO회로를 설계 및 제작하였다. 위상 고정된 발진기는 24.42GHz에서 16.5dBm의 출력을 나타내었으며 위상잡음은 중심주파수 24.42 GHz의 100kHz offset된 지점에서 -76.3 dBc/Hz, 10 kHz offset에서 -72.8 dBc/Hz를 얻었다.

  • PDF

Single-balanced Direct Conversion Quadrature Receiver with Self-oscillating LMV

  • Nam-Jin Oh
    • International Journal of Internet, Broadcasting and Communication
    • /
    • 제15권3호
    • /
    • pp.122-128
    • /
    • 2023
  • This paper proposes two kinds of single-balanced direct conversion quadrature receivers using selfoscillating LMVs in which the voltage-controlled oscillator (VCO) itself operates as a mixer while generating an oscillation. The two LMVs are complementary coupled and series coupled to generate the quadrature oscillating signals, respectively. Using a 65 nm CMOS technology, the proposed quadrature receivers are designed and simulated. Oscillating at around 2.4 GHz frequency, the complementary coupled quadrature receiver achieves the phase noise of -28 dBc/Hz at 1KHz offset and -109 dBc/Hz at 1 MHz offset frequency. The other series coupled receiver achieves the phase noise of -31 dBc/Hz at 1KHz offset and -109 dBc/Hz at 1 MHz offset frequency. The simulated voltage conversion gain of the two single-balanced receivers is 37 dB and 45 dB, respectively. The double-sideband noise figure of the two receivers is 5.3 dB at 1 MHz offset. The quadrature receivers consume about 440 μW dc power from a 1.0-V supply.

교차곡선 연산을 이용한 평면 곡선의 오프셋 계산 (Computing Planar Curve Offset Based on Surface/Surface Intersection)

  • 최정주
    • 한국CDE학회논문집
    • /
    • 제3권2호
    • /
    • pp.127-134
    • /
    • 1998
  • This paper presents d new algorithm to compute the offlet curve of a given planar parametric curve. We reduce the problem of computing an offset curve to that of intersecting a surface to a paraboloid. Given an input curve C(t)=(x(t), y(t))∈R², the corresponding surface D/sub c(t)/ is constructed symbolically as the envelope surface of a one-parameter family of tangent planes of the paraboloid Q:z=x²+y²along a lifted curve C(t)=(x(t), y(t), x(t)²+y(t)²∈Q. Given an offset distance d∈R, the offset curve C/sub d/(t) is obtained by the projection of the intersection curve of D/sub c(t)/ and a paraboloid Q:z=x²+y²-d² into the xy-plane.

  • PDF

반송파 주파수 오프셋의 존재하에서 Trellis Coded OFDM/M-ary PSK 시스템의 성능 분석 (Performance Analysis of Trellis Coded OFDM/M-ary PSK Systems in the presence of tarrier Frequency Offset)

  • 조성언;박기식;오원근
    • 한국정보통신학회논문지
    • /
    • 제5권4호
    • /
    • pp.684-691
    • /
    • 2001
  • 본 논문에서는 OFDM/M-ary PSK 시스템의 BER 성능을 반송파 주파수 오프셋을 고려하여 분석하였고, 부호화와 변조를 동시에 행할 수 있는 TCM 기법을 OFDM/M-ary PSK시스템에 적용하여 반송파 주파수 오프셋에 따른 성능 열화를 보상하였다. 성능 해석 결과, 주파수 오프셋이 커짐에 따라 OFDM/M-ary PSK 시스템의 성능이 열화 됨을 알 수 있었고, 10 dB의 Eb/No로 $BER= 10^{-3}$ 을 달성하기 위해서는 주파수 오프셋을 0.025이하로 제한해야 함을 알 수 있었다. 또한 음성 서비스 ($BER= 10^{-3}$)를 목표로 하는 경우 TCM 기법을 적용함으로써 약 4 dB의 성능 개선이 얻어짐을 알 수 있었다.

  • PDF

3차원 측정자료부터 자유곡면의 가공을 위한 공구경로생성 (Generating Cartesian Tool Paths for Machining Sculptured Surfaces from 3D Measurement Data)

  • 고병철;김광수
    • 대한산업공학회지
    • /
    • 제19권3호
    • /
    • pp.123-137
    • /
    • 1993
  • In this paper, an integrated approach is proposed to generate gouging-free Cartesian tool paths for machining sculptured surfaces from 3D measurement data. The integrated CAD/CAM system consists of two modules : offset surface module an Carteian tool path module. The offset surface module generates an offset surface of an object from its 3D measurement data, using an offsetting method and a surface fitting method. The offsetting is based on the idea that the envelope of an inversed tool generates an offset surface without self-intersection as the center of the inversed tool moves along on the surface of an object. The surface-fitting is the process of constructing a compact representation to model the surface of an object based on a fairly large number of data points. The resulting offset surtace is a composite Bezier surface without self-intersection. When an appropriate tool-approach direction is selected, the tool path module generates the Cartesian tool paths while the deviation of the tool paths from the surface stays within the user-specified tolerance. The tool path module is a two-step process. The first step adaptively subdivides the offset surface into subpatches until the thickness of each subpatch is small enough to satisfy the user-defined tolerance. The second step generates the Cartesian tool paths by calculating the intersection of the slicing planes and the adaptively subdivided subpatches. This tool path generation approach generates the gouging-free Cartesian CL tool paths, and optimizes the cutter movements by minimizing the number of interpolated points.

  • PDF

A Quadrature VCO Exploiting Direct Back-Gate Second Harmonic Coupling

  • Oh, Nam-Jin
    • Journal of electromagnetic engineering and science
    • /
    • 제8권3호
    • /
    • pp.134-137
    • /
    • 2008
  • This paper proposes a novel quadrature VCO(QVCO) based on direct back-gate second harmonic coupling. The QVCO directly couples the current sources of the conventional LC VCOs through the back-gate instead of front-gate to generate quadrature signals. By the second harmonic injection locking, the two LC VCOs can generate quadrature signals without using on-chip transformer, or stability problem that is inherent in the direct front-gate second harmonic coupling. The proposed QVCO is implemented in $0.18{\mu}m$ CMOS technology operating at 2 GHz with 5.0 mA core current consumption from 1.8 V power supply. The measured phase noise of the proposed QVCO is - 63 dBc/Hz at 10 kHz offset, -95 dBc/Hz at 100 kHz offset, and -116 dBc/Hz at 1 MHz offset from the 2 GHz output frequency, respectively. The calculated figure of merit(FOM) is about -174 dBc/Hz at 1 MHz offset. The measured image band rejection is 46 dB which corresponds to the phase error of $0.6^{\circ}$.