• Title/Summary/Keyword: 2D/2D 정합

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Design and Fabrication of a Broadband RF Module for 2.4GHz Band Applications (2.4GHz 대역에서의 응용을 위한 광대역 RF모듈 설계 및 제작)

  • Yang Doo-Yeong;Kang Bong-Soo
    • The Journal of the Korea Contents Association
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    • v.6 no.4
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    • pp.1-10
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    • 2006
  • In this paper, a broadband RF module is designed and tested for 2.4GHz band applications. The RF module is composed of a low noise amplifier (LNA) with a three stage amplifier, a single ended gate mixer, matching circuits, a hairpin line band pass filter and a Chebyshev low pass filter to convert the radio frequency (RF) into the intermediate frequency (IF). The LNA has a high gain and stability, and the single ended gate mixer has a high conversion gain and wide dynamic range. In the analysis of the broadband RF module, the composite harmonic balance technique is used to analyze the operating characteristics of an RF module circuit. The RF module has a 55.2dB conversion gain with a 1.54dB low noise figure, $-120{\sim}-60dBm$ wide RF power dynamic range, -60dBm low harmonic spectrum and a good isolation factor among the RF, IF, and local oscillator (LO) ports.

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Group Delay Time Matched CMOS Microwave Frequency Doubler (군지연 시간 정합 CMOS 마이크로파 주파수 체배기)

  • Song, Kyung-Ju;Kim, Seung-Gyun;Choi, Heung-Jae;Jeong, Yong-Chae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.7
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    • pp.771-777
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    • 2008
  • In this paper, a frequency doubler using modified time-delay technique is proposed. A voltage controlled delay line (VCDL) in the proposed frequency doubler compensates the group delay time mismatching between input and delayed signal. With the group delay time matching and waveform shaping using the adjustable Schmitt triggers, the unwanted fundamental component($f_0$) and the higher order harmonics such as third and fourth are diminished excellently. In result, only the doubled frequency component($2f_0$) appears dominantly at the output port. The frequency doubler is designed at 1.15 GHz of $f_0$ and fabricated with TSMC $0.18\;{\mu}m$ CMOS process. The measured output power at $2f_0$ is 2.67 dBm when the input power is 0 dBm. The obtained suppression ratio of $f_0,\;3f_0$, and $4f_0$ to $2f_0$ are 43.65, 38.65 and 35.59 dB, respectively.

A study on the lip shape recognition algorithm using 3-D Model (3차원 모델을 이용한 입모양 인식 알고리즘에 관한 연구)

  • 김동수;남기환;한준희;배철수;나상동
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 1998.11a
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    • pp.181-185
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    • 1998
  • Recently, research and developmental direction of communication system is concurrent adopting voice data and face image in speaking to provide more higher recognition rate then in the case of only voice data. Therefore, we present a method of lipreading in speech image sequence by using the 3-D facial shape model. The method use a feature information of the face image such as the opening-level of lip, the movement of jaw, and the projection height of lip. At first, we adjust the 3-D face model to speeching face image sequence. Then, to get a feature information we compute variance quantity from adjusted 3-D shape model of image sequence and use the variance quality of the adjusted 3-D model as recognition parameters. We use the intensity inclination values which obtaining from the variance in 3-D feature points as the separation of recognition units from the sequential image. After then, we use discrete HMM algorithm at recognition process, depending on multiple observation sequence which considers the variance of 3-D feature point fully. As a result of recognition experiment with the 8 Korean vowels and 2 Korean consonants, we have about 80% of recognition rate for the plosives and vowels.

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A study on the lip shape recognition algorithm using 3-D Model (3차원 모델을 이용한 입모양 인식 알고리즘에 관한 연구)

  • 남기환;배철수
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.5
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    • pp.783-788
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    • 2002
  • Recently, research and developmental direction of communication system is concurrent adopting voice data and face image in speaking to provide more higher recognition rate then in the case of only voice data. Therefore, we present a method of lipreading in speech image sequence by using the 3-D facial shape model. The method use a feature information of the face image such as the opening-level of lip, the movement of jaw, and the projection height of lip. At first, we adjust the 3-D face model to speeching face Image sequence. Then, to get a feature information we compute variance quantity from adjusted 3-D shape model of image sequence and use the variance quality of the adjusted 3-D model as recognition parameters. We use the intensity inclination values which obtaining from the variance in 3-D feature points as the separation of recognition units from the sequential image. After then, we use discrete HMM algorithm at recognition process, depending on multiple observation sequence which considers the variance of 3-D feature point fully. As a result of recognition experiment with the 8 Korean vowels and 2 Korean consonants, we have about 80% of recognition rate for the plosives md vowels.

Full-Search Block-Matching Motion Estimation Circuit with Hybrid Architecture for MPEG-4 Encoder (하이브리드 구조를 갖는 MPEG-4 인코더용 전역 탐색 블록 정합 움직임 추정 회로)

  • Shim, Jae-Oh;Lee, Seon-Young;Cho, Kyeong-Soon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.85-92
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    • 2009
  • This paper proposes a full-search block-matching motion estimation circuit with hybrid architecture combining systolic arrays and adder trees for an MPEG-4 encoder. The proposed circuit uses systolic arrays for motion estimation with a small number of clock cycles and adder trees to reduce required circuit resources. The interpolation circuit for 1/2 pixel motion estimation consists of six adders, four subtracters and ten registers. We improved the circuit performance by resource sharing and efficient scheduling techniques. We described the motion estimation circuit for integer and 1/2 pixels at RTL in Verilog HDL. The logic-level circuit synthesized by using 130nm standard cell library contains 218,257 gates and can process 94 D1($720{\times}480$) image frames per second.

Design and Fabrication of Ka-band Waveguide Combiner with High Efficiency and High Isolation Characteristics (고효율 및 높은 격리 특성을 갖는 Ka 대역 도파관 결합기 설계 및 제작)

  • Kim, Hyo-Chul;Cho, Heung-Rae;Lee, Ju-Heun;Lee, Deok-Jae;An, Se-Hwan;Lee, Man-Hee;Joo, Ji-Han;Kim, Hong-Rak
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.22 no.2
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    • pp.35-42
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    • 2022
  • In this paper, a method to increase the combining efficiency and isolation of the combiner, the core module of SSPA (solid state amplifier), was studied. Specifically, the isolation was secured by matching the common port and the isolation port in the waveguide combiner. The matching structure for matching is in the form of a circular disk and is engraved inside the waveguide combiner. The structure is very simple, so it is possible to secure stable performance. And this structure showed more than 60 times higher critical power performance compared to previous studies, confirming that it is suitable for high output. And by combining 1-stage T-junction and 2, 3 stage MagicT combiner, miniaturization was achieved and the combining efficiency was optimized by reducing the insertion loss. The fabricated waveguide coupler obtained an isolation of 16dB or more and a coupling efficiency of 86.2%.

Design and Development of VDL Mode-2 D8PSK Modem (VDL Mode-2 D8PSK 모뎀 설계 및 개발)

  • Gim, Jong-Man;Choi, Seoung-Duk;Eun, Chang-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.11C
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    • pp.1085-1097
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    • 2009
  • We present a structure and design method of the D8PSK modem compatible with the VDL mode-2 standard and performance test results of the developed modem. In VDL mode-2, the raised cosine filter is used only in the transmitter and a general low pass filter is used in the receiver. Consequently, we can not achieve ISI reduction but can have better spectrum characteristics. Although there is 1~2 dB performance degradation with an un-matched filter compared to that with a matched filter, it is more important to minimize adjacent channel interference in narrow band communications. The transmit signal is generated digitally to avoid the problems(I/Q imbalance and DC offset etc.) of analog modulators. In addition the digital down converter using digital IF sampling technique is adopted for the receiver. This paper contains the overall configuration, design method and simulation results based in part on the previously proposed structures and algorithms. It is confirmed that the modem transmits and receives messages successfully at a speed of max. 870 km/h over ranges of up to 310 km through the ground and in-flight communication tests.

Camera Extrinsic Parameter Estimation using 2D Homography and LM Method based on PPIV Recognition (PPIV 인식기반 2D 호모그래피와 LM방법을 이용한 카메라 외부인수 산출)

  • Cha Jeong-Hee;Jeon Young-Min
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.43 no.2 s.308
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    • pp.11-19
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    • 2006
  • In this paper, we propose a method to estimate camera extrinsic parameter based on projective and permutation invariance point features. Because feature informations in previous research is variant to c.:men viewpoint, extraction of correspondent point is difficult. Therefore, in this paper, we propose the extracting method of invariant point features, and new matching method using similarity evaluation function and Graham search method for reducing time complexity and finding correspondent points accurately. In the calculation of camera extrinsic parameter stage, we also propose two-stage motion parameter estimation method for enhancing convergent degree of LM algorithm. In the experiment, we compare and analyse the proposed method with existing method by using various indoor images to demonstrate the superiority of the proposed algorithms.

The Design of Wideband Printed Saw Tooth Monopole Antenna (광대역 기판 인쇄형 톱날구조를 갖는 모노폴 안테나 설계)

  • Kim Nan-Ki;Go Jin-Hyun;Ha Jae-Kwon;Rhee Seung-Yeop
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.10 s.89
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    • pp.915-921
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    • 2004
  • In this paper, we propose a printed monopole antenna called the saw tooth monopole antenna(STMA) with a very wide band. And impedance matching of the antenna for the wideband is achieved using a special matching structure to vary ground size of back plate. The proposed antenna is smaller than general $\lambda$/4 monopole antenna in size but provides a 2:1 VSWR bandwidth of about $89.6\%$. The radiation pattern is omni-directional at 0.8 GHz$\~$2.0 GHz with gain of about -0.02 dBi$\~$2.54 dBi.

A Novel Waveguide-based Ka-band Power Divider/Combiner Using Slotline-to-Microstrip Transitions (슬롯라인-마이크로스트립 변환을 이용한 도파관 형태의 Ka-band 전력 분배/결합기)

  • 정진호;천창율;권영우
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.5C
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    • pp.506-511
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    • 2002
  • In this paper, waveguide-based power combiner using conventional slotline-to-microstrip transition was proposed at Ka-band. The proposed 2-way and 4-way power combiner consist of waveguide-to-slotline transition, two or four slotline-to-microstrip transitions, and impedance matching networks. Their structures were simulated and optimized by 3-D FEM simulation. The 2-way power combiner showed a very low back-to-back insertion loss of 1.0 dB and return loss better than 15 dB from 25.7 GHz to 29.8 GHz except the resonant frequency. The 2-way power combining approach was extended to 4-way power combining using slotline tee junction. The 4-way power combiner showed the similar performance to that of 2-way power combiner with 2 GHz smaller bandwidth.