• Title/Summary/Keyword: 2-step Annealing

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스퍼터링 방식으로 형성시킨 코발트 실리사이드 박막의 형성 및 특성

  • 조한수;백수현;황유상;최진석;정주혁
    • Proceedings of the Materials Research Society of Korea Conference
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    • 1993.05a
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    • pp.62-63
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    • 1993
  • Salicide(Self-aligned) CoSi$_2$의 형성을 알아보기 위하여, 단결정 실리콘 기판내에 불순물 주입에 따른 실리사이드의 형성영향을 알아보는, As,BF$_2$를 주입 한 시편과, 코발트와 SiO$_2$를 증착한 시편을 준비하였다. RF sputtering 방식으로 각각의 기판위에 코발트를 증착 한 후 Rapid Thermal Annealing(RTA) 온도 400-100$0^{\circ}C$영역에서 20초 동안 열처리 하였다. RTA 온도 80$0^{\circ}C$에서 비저항이 약 18$\mu$$\Omega$-cm정도의 CoSi$_2$를 형성 시켰으며 SEM 과 $\alpha$-step 으로 확인된 Si 기판과 코발트 실리사이드의 계면 roughness 및 surface roughness는 우수하였고, CoSi$_2$의 두께 증가에 따른 실리콘 소모량의 증가에 따라 기판내에 있던 As,BF$_2$ 이온들이 실리사이드내로 재분포 되는 현상을 보였다.CoSi$_2$/Si 계면간의 열적안정성은 $N_2$분위기로 30분간 Furnace Annealing 온도 100$0^{\circ}C$까지 CoSi$_2$의 응집화 현상이 일어나지 않았다.

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Synthesis and Characterization of SiO2-Sheathed ZnSe Nanowires

  • Kim, Hyun-Su;Jin, Chang-Hyun;A,, So-Yeon;Lee, Chong-Mu
    • Bulletin of the Korean Chemical Society
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    • v.33 no.2
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    • pp.398-402
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    • 2012
  • ZnSe/$SiO_2$ coaxial nanowires were synthesized by a two-step process: thermal evaporation of ZnSe powders and sputter-deposition of $SiO_2$. Two different types of nanowires are observed: thin rod-like ones with a few to a few tens of nanometers in diameter and up to a few hundred of micrometers in length and wide belt-like ones with a few micrometers in width. Room-temperature photoluminescence (PL) measurement showed that ZnSe/$SiO_2$ coaxial nanowires had an orange emission band centered at approximately 610 nm. The intensity of the orange emission from the $SiO_2$-sheathed ZnSe nanowires was enhanced significantly by annealing in a reducing atmosphere whereas it was degraded by annealing in an oxidizing atmosphere. The origins of the PL changes by annealing are discussed based on the energy-dispersive X-ray spectroscopy analysis results.

High-Quality Epitaxial Low Temperature Growth of In Situ Phosphorus-Doped Si Films by Promotion Dispersion of Native Oxides (자연 산화물 분산 촉진에 의한 실 시간 인 도핑 실리콘의 고품질 에피택셜 저온 성장)

  • 김홍승;심규환;이승윤;이정용;강진영
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.13 no.2
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    • pp.125-130
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    • 2000
  • Two step growth of reduced pressure chemical vapor eposition has been successfully developed to achieve in-situ phosphorus-doped silicon epilayers, and the characteristic evolution on their microstructures has been investigated using scanning electron microscopy, transmission electron microscopy, and secondary ion mass spectroscopy. The two step growth, which employs heavily in-situ P doped silicon buffer layer grown at low temperature, proposes crucial advantages in manipulating crystal structures of in-situ phosphorus doped silicon. In particular, our experimental results showed that with annealing of the heavily P doped silicon buffer layers, high-quality epitaxial silicon layers grew on it. the heavily doped phosphorus in buffer layers introduces into native oxide and plays an important role in promoting the dispersion of native oxides. Furthermore, the phosphorus doping concentration remains uniform depth distribution in high quality single crystalline Si films obtained by the two step growth.

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Study on the Thin-film Transistors Based on TiO2 Active-channel Using Atomic Layer Deposition Technique (원자층 증착 기술을 이용한 TiO2 활성층 기반 TFT 연구)

  • Kim, Sung-Jin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.7
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    • pp.415-418
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    • 2015
  • In this paper, $TiO_2$ based thin-film transistors (TFTs) were fabricated using by an atomic layer deposition with high aspect ratio and excellent step coverage. $TiO_2$ semiconducting layer was deposited showing a rutile phase through the rapid thermal annealing process, and exhibited TFT characteristics with a $200{\mu}m$ channel length of low-leakage currents (none of current flow during off-state), stable threshold voltages (-10 V ~ 0 V), and a much higher on/off current ratio (<$10^5$), respectively.

A study on the design of boron diffusion simulator applicable for shallow $p^+-n$ junction formation (박막 $p^+-n$ 접합 형성을 위한 보론 확산 시뮬레이터의 제작에 관한 연구)

  • Kim, Jae-Young;Kim, Bo-Ra;Hong, Shin-Nam
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.04b
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    • pp.30-33
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    • 2004
  • Shallow p+-n junctions were formed by low-energy ion implantation and dual-step annealing processes The dopant implantation was performed into the crystalline substrates using $BF_2$ ions. The annealing was performed with a rapid thermal processor and a furnace. FA+RTA annealing sequence exhibited better junction characteristics than RTA+FA thermal cycle from the viewpoint of junction depth. A new simulator is designed to model boron diffusion in silicon, which is especially useful for analyzing the annealing process subsequent to ion implantation. The model which is used in this simulator takes into account nonequilibrium diffusion, reactions of point defects, and defect-dopant pairs considering their charge states, and the dopant inactivation by introducing a boron clustering reaction. Using a resonable parameter values, the simulator covers not only the equilibrium diffusion conditions but also the nonequilibrium post-implantation diffusion. Using initial conditions and boundary conditions, coupled diffusion equation is solved successfully. The simulator reproduced experimental data successfully.

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Preparation of C-plane oriented BaFe12O19 film by electrospray deposition of colloidal precursor particles (정전분무 장치를 이용한 C축 일방향 바륨페라이트(BaFe12O19) 박막형성)

  • Lee, Hye Moon;Kim, Yong Jin
    • Particle and aerosol research
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    • v.6 no.1
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    • pp.21-27
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    • 2010
  • New process consisting of electrospray and epitaxial crystal growth processes was applied to the preparation of c-plane oriented barium ferrite ($BaFe_{12}O_{19}$) thin film for high density magnetic recording media. Sodium citrate aided process was proper to preparation of amorphous $BaFe_{12}O_{19}$ nanoparticles with geometric mean diameter of 3 nm and geometric standard deviation of 1.1. The electrospray was applicable to the prepare of amorphous $BaFe_{12}O_{19}$ thin film on a substrate, and the film thickness could be controlled by adjusting the electrospray deposition time. The c-plane oriented $BaFe_{12}O_{19}$ thin film was successfully prepared by 3 step annealing process of the $BaFe_{12}O_{19}$ amorphous film on a sapphire($Al_2O_3$) substrate; annealing at $350^{\circ}C$ for 30 min, annealing at $500^{\circ}C$ for 30 min, and annealing at $700^{\circ}C$ for 60 min.

Enhancement in electrical and optical properties of ITO thin films grown by 2-step process at room temperature (2-step 공정법에 의해 상온 증착된 ITO박막의 전기 광학적 특성 향상)

  • Kim, Jong-Hoon;Ahn, Byung-Du;Jeon, Kyung-Ah;Kang, Hong-Seong;Lee, Sang-Yeol
    • Proceedings of the KIEE Conference
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    • 2005.11a
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    • pp.6-8
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    • 2005
  • The optical and electrical properties of indium tin oxide (ITO) thin films deposited at room temperature can be substantially enhanced by adopting a two-step process. In the first step, the films (50 nm thick) were grown by pulsed laser deposition (PLD) on glass substrate at room temperature and quickly annealed at $400^{\circ}C$ in nitrogen ambient for 1 minute by using rapid thermal annealing method. The process was completed by additional deposition (150 nm thick) on annealed film at room temperature. High quality ITO films grown by two-step process at room temperature could be obtained with the resistivity of $3.02{\times}10^{-4}{\Omega}cm$, the carrier mobility of 32.07 $cm^2/Vs$, and the transparency above 90 % in visible region mainly due to the enhancement of the film crystallinity and the increase of grain size.

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Effect of pre-annealing conditions on mechanical and superconducting properties of Bi-2223/Ag tapes (초전도 선재의 전 열처리에 따른 기계적 및 초전도 특성에 미치는 효과)

  • 양주생;하동우;이동훈;최정규;황선역;하홍수;오상수;권영길;김명호
    • Progress in Superconductivity
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    • v.5 no.2
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    • pp.124-127
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    • 2004
  • Many of research efforts have been focused on the improvement of critical current density (Jc) of silver-sheathed Bi-2223 tapes far practical applications. In this study, the transformation of Bi-2212 phase was investigated, which was transformed to orthorhombic from tetragonal through pre-annealing during powder packing and drawing process. The relationship between hardness of Bi-2212 orthorhombic phase and workability of Bi-2223/Ag tape was investigated. Bi-2223 superconducting wires with 55 filaments were fabricated by stacking and drawing process with different heat-treatment histories. Before rolling process, round wires were pre-annealing at 76$0^{\circ}C$ and in a low oxygen partial pressure. We confirmed that pre-annealing step was to transform to Bi-2212 orthorhombic structure from Bi-2212 tetragonal structure and to reduce the formation of second phases. However the breakages were created at Ag-alloy clad during rolling for pre-annealed Bi-22231Ag tapes. Several pre-annealing scenarios were introduced to reduce the breakages during rolling process. Microstructure and critical current density of pre-annealed Bi-2223 superconducting tapes were investigated. We could achieve proper pre-annealing conditions for Ag-alloy clad Bi-2223 superconducting tapes.

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Electrical Properties of SiOCH Thin Films by Annealing (SiOCH 박막의 열처리에 따른 전기적인 특성)

  • Kim, Min-Seok;Hwang, Chang-Su;Kim, Hong-Bae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.12
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    • pp.1090-1095
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    • 2008
  • The SiOCH films that low dielectric interlayer dielectric materials were deposited on p-type Si(100) substrates through the dissociation of BTMSM precursors with oxygen gas by using PECVD method. BTMSM precursor was introduced with the flow rates from 42 sccm to 60 sccm by 2 sccm step in the constant flow rate of 60 sccm $O_2$. SiOCH thin films were annealed at $450^{\circ}C$ for 30 minutes. The electrical property of SiOCH thin films was studied by MIS, Al/SiOCH/p-Si(100), structure. Annealed samples showed even greater reductions of the maximum capacitance and the dielectric constant of the SiOCH samples, owing to reductions of surface charge density. we confirmed this result with derivative of C-V characteristic, leakage current density. The maximum capacitance and leakage current density were respectively decreased about 4 pF, 60% after annealing. The average of low-k value is approximatly 2.07 after annealing.

Ferroelectric Properties of PZT thin Films by Rapid Thermal Annealing (RTA처리한 PZT 박막의 강유전 특성)

  • Jeong, Kyu-Won;Park, Young;Ju, Pil-Yeon;Cho, Ik-Hyun;Lim, Dong-Gun;Yi, Jun-Sin;Song, Joon-Tae
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.4
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    • pp.232-238
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    • 2000
  • PZT thin films(3500 ) have been prepared onto $Pt/Ti/SiO_2/Si$ substrates with a RF magnetron sputtering system using PB1.05(Zr0.52,Ti0.48)O3 ceramic target. We used two-step annealing techniques. As the RTA times and temperatures were increased, crystallization of PZT thin films were enhanced. The ferroelectric characteristics of PZT capacitors fabricated at $700^{\circ}C$ for 60 seconds were like these remanent polarization were $12.1 \muC/cm^2$, coercive field were 110 kV/cm, leakage current density were $4.1\times10-7 A/cm^2,\; \varepsilonr=442,$ and remanent polarization were decreased by 22% after 1010 cycles, respectively.

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