• Title/Summary/Keyword: 2-dimensional device simulator

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Breakdown and On-state characteristics of the Multi-RESURF SOI LDMOSFET (Epi층의 농도 및 두께 변화에 따른 Multi-RESURF SOI LDMOSFET의 특성분석)

  • Kim, Hyoung-Woo;Kim, Sang-Cheol;Seo, Kil-Su;Kim, Nam-Kyun;Kim, Eun-Dong
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1578-1580
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    • 2002
  • The breakdown and on-state characteristics of the multi-RESURF SOI LDMOSFET is presented. P-/n-epi layer thickness and doping concentration is varied from $2{\mu}m{\sim}5{\mu}m$ and $1{\times}10^{15}/cm^3{\sim}9{\times}10^{15}/cm^3$ to obtain optimum breakdown voltage and on-resistance. The breakdown and on-state characteristics of the device is verified by two-dimensional process simulator ATHENA and device simulator ATLAS.

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A Two-dimensional Numerical Analysis of Semiconductor Laser Diodes) (반도체 레이저 디이오드의 2차원 수치해석)

  • 김형래;곽계달
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.11
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    • pp.17-28
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    • 1995
  • In this paper, we developed a two-dimensional numerical simulator which could analyze the stripe geometry semiconductor laser diodes by modifying the commercial semiconductor device simulator, MEDICI. In order to study the characteristics of semiconductor laser diodes, it is necessary to solve the Helmholtz wave equation and photon rate equation in addition to the basic semiconductor equations. Also the recombination rates due to the spontaneous and the stimulated emissions should be included, which are very important recombination mechanisms in semiconductor laser diodes. Therefore, we included the solution routines which analyzed the Helmholtz wave equation and the photon rate equation and two important recombination rates to simulate the semiconductor laser diodes. Then we simulated the gain-guiding and index-guiding DH(Double Heterostructure) semiconductor laser diodes to verify the validity of the implemented functions. The results obtained from simulation are well consistent with the previously published ones. This allows us to know the operating characteristics of DH laser diodes and is expected to use as a tool for optimum design.

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Harmonic Motion-based Simulator Design for Multipurpose Sports Simulation

  • Yang, Jeong-Yean
    • International journal of advanced smart convergence
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    • v.4 no.2
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    • pp.163-169
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    • 2015
  • This study proposes a sports simulation device with various harmonics generation. The proposed system is composed of 6 degrees of freedom simulator devices and three types of sports simulation such as walking, snowboard, and jet-ski. In this research, every joint movement is designed with a crank-and-slider mechanism, which is efficient for generating continuous curvature smoothly. Contrary to the conventional spatial simulator with linear actuators, harmonics generation and its spatial combinations become the crucial issue in this research. The harmonic pattern in each joint is modelled for generating smooth curvatures that are also superposed for achieving overall motions. In addition, the targeted motions of sports simulations have different physical factors of periodic gait motion, frictionless surface, and buoyant effects, which are respectively designed by integrating three dimensional graphics information.

AC Modeling of the ggNMOS ESD Protection Device

  • Choi, Jin-Young
    • ETRI Journal
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    • v.27 no.5
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    • pp.628-634
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    • 2005
  • From AC analysis results utilizing a 2-dimensional device simulator, we extracted an AC-equivalent circuit of a grounded-gate NMOS (ggNMOS) electrostatic discharge (ESD) protection device. The extracted equivalent circuit is utilized to analyze the effects of the parasitics in a ggNMOS protection device on the characteristics of a low noise amplifier (LNA). We have shown that the effects of the parasitics can appear exaggerated for an impedance matching aspect and that the noise contribution of the parasitic resistances cannot be counted if the ggNMOS protection device is modeled by a single capacitor, as in prior publications. We have confirmed that the major changes in the characteristics of an LNA when connecting an NMOS protection device at the input are reduction of the power gain and degradation of the noise performance. We have also shown that the performance degradation worsens as the substrate resistance is reduced, which could not be detected if a single capacitor model is used.

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Simulation of Characteristics of Amorphous-Silicon Thin Film Transistor for Liquid Crystal Display Using the Mixed Simulator (혼합시뮬레이터를 사용한 액정 표시기용 비정질 실리콘 박막 트랜지스터의 특성 시뮬레이션)

  • 이상훈;김경호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.122-129
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    • 1995
  • The most important feature of a-Si TFT is dense localized states such as dangling bonds which exist in tis bandgap. Electrons trapped by localized states dominate the potential distribution in the active a-Si region ,and influence the performance of a-Si TFT. In this paper, we describe the electrical characteristics of a-Si TFT with respect to trap distribution within bandgap, electron mobility and interface states using 2-Dimensional device simulator and compare the result of simulation with measurements. Using the mixed-mode simulator, we can predict the potential variation of pixel which causes residual image problem during the turn-off of a-Si TFT driving circuit. Therefore it is possible to consider trade-off between potential variation of pixel and turn-on current of a-Si TFT for the optimized driving circuit.

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Analysis of the PN diode circuit under the transient condition with 2-dimensional mixed mode device-circuit simulator (2차원 혼합모드 소자-회로 시뮬레이터에 의한 PN 다이오드 회로의 과도상태 해석)

  • 이원호;이은구;김태한;김철성
    • Proceedings of the IEEK Conference
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    • 1998.06a
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    • pp.359-362
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    • 1998
  • 2차원 혼합 모드 소자-회로 시뮬레이터를 이용한 과도상태 해석의 알고리즘을 제시한다. 1변수 muller 및 regular falsi법을 회로의 절점 전압과 분기(branch) 전류를 계산하는데 적용하였다. 제안된 알고리즘의 정확도와 유호성을 검증하기 위해 PN 다이오드의 양극(anode)에 저항이 직렬로 연결된 회로의 모의실험을 수행한 결과, MEDICI의 모의실험 결과에 비해 과도상태에서 전류 및 전압 특성은 각각 0.06%, 0.2% 오차 범위 한도 내에서 일치함을 보였다.

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Structure Optimization of ESD Diodes for Input Protection of CMOS RF ICs

  • Choi, Jin-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.401-410
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    • 2017
  • In this work, we show that the excessive lattice heating problem due to parasitic pnp transistor action in the diode electrostatic discharge (ESD) protection device in the diode input protection circuit, which is favorably used in CMOS RF ICs, can be solved by adopting a symmetrical cathode structure. To explain how the recipe works, we construct an equivalent circuit for input human-body model (HBM) test environment of a CMOS chip equipped with the diode protection circuit, and execute mixed-mode transient simulations utilizing a 2-dimensional device simulator. We attempt an in-depth comparison study by varying device structures to suggest valuable design guidelines in designing the protection diodes connected to the $V_{DD}$ and $V_{SS}$ buses. Even though this work is based on mixed-mode simulations utilizing device and circuit simulators, the analysis given in this work clearly explain the mechanism involved, which cannot be done by measurements.

A Study on the Energy Band of Amorphous Silicon using a Two-Dimensional Device Simulator(TFT2DS) (이차원 소자 시뮬레이터를 이용한 비정질 실리콘 에너지대에 관한 연구)

  • 곽지훈;이영삼;최종선
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1997.11a
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    • pp.325-327
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    • 1997
  • TFT2DS was developed to provide the usability as an analytic and design tool. The static characteristics of a-Si TFTs demonstrated a good agreement between simulated and measured data. This paper shows that WDS can optimize the physical parameters of a-Si through sensitivity simulations and compute the static characteristics of a-Si TFTs.

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Study on the Electrical Characteristics of the Multi-RESURF SOI LDMOSFET as a Function of Epi-layer Concentration (에피층 농도 변화에 따른 Multi-RESURF SOI LDMOSFET의 전기적 특성 분석)

  • Kim, Hyoung-Woo;Seo, Kil-Soo;Bahng, Wook;Kim, Ki-Hyun;Kim, Nam-Kyun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.9
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    • pp.813-817
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    • 2006
  • In this paper, we analyzed the breakdown voltage and on-resistance of the multi-RESURF SOI LDMOSFET as a function of epi-layer concentration. P-/n-epi layer thickness and doping concentration of the proposed structure are varied from $2{\sim}5{\mu}m\;and\;1\{times}10^{15}/cm^{3}^{\sim}9\{times}10^{15}/cm^{3}$ to find optimum breakdown voltage and on-resistance of the proposed structure. The maximum breakdown voltage of the proposed structure is $224\;V\;at\;R_{on}=0.2{\Omega}-mon^{2}\;with\;P_{epi}=3\{times}10^{15}/cm^{3},\;N_{epi}=7\{times}10^{15}/cm^{3}\;and\;L_{epi}=10{\mu}m$. Characteristics of the device are verified by two-dimensional process simulator ATHENA and device simulator ATLAS.

Electrical properties of SOI n-MOSFET's under nonisothermal lattice temperature (격자온도 불균일 조건에서 SOI n-MOSFET의 전기적 특성)

  • 김진양;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.3
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    • pp.89-95
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    • 1996
  • In this ppaer, temeprature dependent transport and heat transport models have been incorperated to the two dimensional device simulator SNU-2D provides a solid bse for nonisothermal device simulation. As an example to study the nonisothermal problem. we consider SOI MOSFET's I-V characteristics have been simulated and compared with the measurements. It is shown that negative slopes in the Ids-Vds characteristics are casused by the temperature dependence of the saturation velocity and the degradation of the temperature dependence mobility. Also it is shown that the kink effect occurs when impact ionization near the drain produces a buildup of holes in this isolated device island, and the hysteresis is caused by the creation of holes in the channel and their flow to the source.

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