• Proceedings of the KIPE Conference
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• 2001.12a
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• pp.79-82
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• 2001

New electronic ballast for metal halide laws is proposed New ballast has higher efficiency than that of conventional ballast. Proposed 2 stage ballast uses low arm switch as synchronous rectifier mitch. Switch-on voltage drop is smaller than that of diode in small current(<1.5A). High arm switch is turned on in zero voltage in proposed ballast. So conduction loss and switching loss are reduced Index word - synchronous rectifier mitch, toro voltage switching, conduction loss, switching loss.

• Communications for Statistical Applications and Methods
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• v.8 no.2
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• pp.435-442
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• 2001

Bayes estimators and generalized ML estimators for reliability of a k-unit hot standby system with the perfect switch based upon a complete sample of failure times observed from an exponential distribution using noninformative, generalized uniform, and gamma priors for the failure rate are proposed, and MSE's of proposed several estimators for the standby system reliability are compared numerically each other through the Monte Carlo simulation.

• Communications for Statistical Applications and Methods
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• v.7 no.2
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• pp.525-531
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• 2000

Bayes estimators for reliability of a two-unit hot standby system with the imperfect switch based upon a complete sample of failure times observed from exponential distributions under squared error loss and some priors for failure rates are proposed, and mean squared errors of proposed several Bayes estimators for the system reliability are compared unmerically each other through the Monte Carlo simulation.

• Journal of Korean Institute of Industrial Engineers
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• v.22 no.2
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• pp.277-302
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• 1996

The overall performance of BISDN depends significantly on the interconnection network or the switch fabric. Hence, it is extremely important to evaluate the performance of the network or the fabric. The well developed performance models also provide insight into the factors that determine design tradeoffs as well as quantitative estimates of their importance. The objective of this paper is to investigate and critically compare all the developed performance analysis models of FPS according to internal switch fabric structure, traffic assumptions, performance measures, methodologies, etc. FPSs are described according to their internal fabric structure. Brief history of FPS performance analysis is mentioned and performance analysis modeling is discussed.

• Management Science and Financial Engineering
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• v.10 no.2
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• pp.89-102
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• 2004

In this paper, we deal with a processor assignment problem that minimizes the total traffic load of an ATM switch controller by optimally assigning processors to ATM interface units. We develop an integer programming (IP) model for the problem, and devise an effective tabu search heuristic. Computational results reveal the efficacy of the proposed tabu search procedure, finding a good quality solution within 5% of optimality gap.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.281-284
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• 2001

In this paper, we design the Sorting-Banyan network with an efficient buffer and sorting management schema that makes switch be capable of supporting delay sensitive as well as loss sensitive. The proposed switching network is remodeled that based on Batcher-banyan network that have eight input and output ports The structure of designed switching network is constructed of modified banyan network with 2-way routing paths and two plane sorting networks. we have analysed the maximum throughput of the switch, under the uniform random traffic load, the FIFO discipline has increased by about 11% when we compare the switching system with the input buffering system.

• 전기의세계
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• v.26 no.2
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• pp.72-77
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• 1977

This paper is devoted primarily to a study of magnetic switch which does not produce any harmful are during the switching period using triacs. The arc-eliminating method presented in this paper experimentally obtained the desired results, and also we executed numerical analysis by computer. This method will be greatly helpful for protecting contacts of magnetic switch in case of freuqent operation.

• Journal of the Semiconductor & Display Technology
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• v.6 no.2 s.19
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• pp.49-52
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• 2007

Characteristics of an active pixel switch readout circuit were studied by SPICE simulation. A simple readout circuit consists of an operation amplifier, a diode, and a down-counter was suggested, and its successful operation was verified by showing that the differences in the detected signal intensity are accordingly converted to modulation of the voltage pulses generated by the comparator. A scheme to use these pulses to generate the original image was also put forward.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.397-398
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• 2013

Fairchild Green Mode off line buck switch for low standby power consumption and high reliability is presented. By reducing operating current and optimizing switching frequency, 20mW power consumption is achieved. High performance trans-conductance amplifier and green mode function improve the ripple and regulation in the output voltage. The conventional $FPS^{TM}$ buck and novel Fairchild buck switch are compared to show the improvement of performance. Experimental results are showed using 2W evaluation board.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.35-41
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• 2008

This paper presents the design method of current-mode signal processing for high speed and low power digital audio signal processing. The digital audio processor requires a digital signal processing such as fast Fourier transform (FFT), which has a problem of large power consumption according to the settled point number and high speed operation. Therefore, a current-mode signal processing with a switched Current (SI) circuit was employed to the digital audio signal processing because a limited battery life should be considered for a low power operation. However, current memory that construct a SI circuit has a problem called clock-feedthrough. In this paper, we examine the connection of dummy MOS that is the common solution of clock-feedthrough and are willing to calculate the relation of width between dummy MOS for a proposal of the design methodology for improvement of current memory. As a result of simulation, in case of that the width of memory MOS is 20um, ratio of input current and bias current is 0.3, the relation of width between switch MOS and dummy MOS is $W_{M4}=1.95W_{M3}+1.2$ for the width of switch MOS is 2~5um, it is $W_{M4}=0.92W_{M3}+6.3$ for the width of switch MOS is 5~10um. Then the defined relation of MOS transistors can be a useful design guidance for a high speed low power digital audio processor.