• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.53-61
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• 2006

In high speed flash type or pipelining type A/D Converter, the faster sampling frequency is, the more the effect of DC reference fluctuation is increased by clock feed-through and kick-back. When we measure A/D Converter, further, external noise increases reference voltage fluctuation. Thus reference fluctuation reduction circuit must be needed in high speed A/D converter. Conventional circuit simply uses capacitor but layout area is large and it's not efficient. In this paper, a reference fluctuation reduction circuit using transmission gate is proposed. In order to verify the proposed technique, we designed and manufactured 6bit 2GSPS CMOS A/D converter. The A/D converter is based on 0.18um 1-poly 5-metal N-well CMOS technology, and it consumes 145mW at 1.8V power supply. It occupies chip area of $977um\times1040um$. Experimental result shows that SNDR is 36.25 dB and INL/DNL ${\pm}0.5LSB$ when sampling frequency is 2GHz.

• Publications of The Korean Astronomical Society
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• v.19 no.1
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• pp.101-107
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• 2004

This paper describes the digital back-end system for getting the data to analyze the user observation mode by digitalize the analog data after receiving the space radio using the radio telescope, The received analog data will be digitalized by high-speed sampler with 1 Gsps for 4 channel frequency band of millimeter wave, and the digital data will be transported through the fiber-optic digital transmission system and WDM(wavelength division multiplex) to observation building, The wideband digital FIR(Finite Impulse Response) filters analyze the data for user observation mode to record the data in high-speed recorder with 1 Gbps. In this paper, we introduce the overall system configuration and features combined by various information and communication technology in radio astronomy briefly, which will be adopted by KVN(Korean VLBI Network).

• Publications of The Korean Astronomical Society
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• v.20 no.1 s.24
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• pp.125-134
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• 2005

In this paper, we propose a small-scale Gigabit VLBI observing system for the Korean VLBI Network (KVN) under construction. The system consists of high-speed sampler, IP-VLBI board, PC-VSI board, and software correlator. Radio signal received by receiver is sampled by high-speed sample. at 1 Gsps (Gigabit sample per second) rate with 2 bits quantization. The digitized signal is recorded in PC and the software correlator does the cross correlation. IP-VLBI board will be used for the geodesy VLBI observation, while PC-VSI board is for the astronomical VLBI observation. The PC-VSI board adopts the VSI-H (VLBI Standard Interface Hardware). The proposed system is based on commercial PCs and therefore can be built inexpensively.

• Publications of The Korean Astronomical Society
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• v.21 no.2
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• pp.95-100
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• 2006

In this paper, we describe the radio astronomical data processing system implementation using Mark5B and its development. KASI(Korea Astronomy and Space Science Institute) is constructing the KVN (Korean VLBI Network) until the end of 2007, which is the first VLBI(Very Long Baseline Interferometery) facility in Korea and dedicated for the mm-wave VLBI observation. KVN will adopt the DAS (Data Acquisition System) consisting of digital filter with various function and 1Gsps high-speed sampler to digitize the radio astronomical data for analyzing on the digital filter system. And the analyzed data will be recorded to recorder up to 1Gbps data rates. To test this, we have implemented the system which is able to process 1Gbps data rates and carried out the data recording experiment.

• Journal of the Institute of Convergence Signal Processing
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• v.18 no.1
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• pp.13-20
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• 2017

In this paper, we evaluate the basic test results of the 32 Gbps observational equipment introduced as the back-end system for the wideband VLBI (Very Long Baseline Interferometry) observation of KVN (Korean VLBI Network). Radio astronomers want to make a large radio telescope that has excellent performance in order to observe the superfine structure of a celestial body, but a lot of money is needed. Therefore, in order to increase the sensitivity, the performance improvement of the receiving system and the method of observing the wide frequency bandwidth are introduced. To do this, we adopted a wideband sampling method for converting analog signals to digital with ultra-fast speeds and a wideband sampler for performing digital filtering in order to observe a wide observational frequency bandwidth. The wideband sampler (OCTAD-K) supports up to 16 Gsps-2bits sampling and supports a variety of observational bandwidth using digital filtering techniques. In particular, it is designed to support KVN's 4-frequency simultaneous observation system and VERA(VLBI Exploration of Radio Astrometry)'s 2-beam observation system. It can also support polKVN(Korean VLBI Network), KaVA(KVN and VERA Array), 32Gbps Direct Sampler, Digital Filter, Widebandarization observations and supports the standard VDIF(VLBI Data Interchange Format) format of observed data. In this paper, the performance of the system and the problem solving are described in detail after performing the factory inspection and field test before the system is introduced.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.3
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• pp.205-210
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• 2007

This paper presents a CMOS TIQ flash A/D converter which operates very fast compared to other types of A/D converters due to its parallel architecture. The output resolution of designed A/D converter is 6-bit. In order to reduce the power consumption and chip area of conventional flash A/D converter, TIQ based flash A/D converter is proposed, which uses the advantage of the structure of CMOS transistors. The length and width of transistors of TIQ were determined with HSPICE simulation. To speed up the ultra-high speed flash A/D converter, the Fat Tree Encoder technique is used. The TIQ A/D converter was designed with full custom method. The chip's maximum power consumption was 38.45mW at 1.8V, and the operating speed of simulation was 2.7 GSPS.

• Journal of the Institute of Convergence Signal Processing
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• v.9 no.1
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• pp.54-61
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• 2008

This paper presents a new TIQ based CMOS flash 6-bit ADC to process digital signal in real time. In order to improve the conversion speed of ADC by designing new logic or layout of ADC circuits, a new design method is proposed in encoding logic circuits. The proposed encoding circuits convert analog input into digitally encoded double base number system(DBNS), which uses two bases unlike the normal binary representation scheme. The DBNS adopts binary and ternary radix to enhance digital arithmetic processing capability. In the DBNS, the addition and multiplication can be processed with just shift operations only. Finding near canonical representation is the most important work in general DBNS. But the main disadvantage of DBNS representation in ADC is the fan-in problem. Thus, an equal distribution algorithm is developed to solve the fan-in problem after assignment the prime numbers first. The conversion speed of simulation result was 1.6 GSPS, at 1.8V power with the Magna $0.18{\mu}m$ CMOS process, and the maximum power consumption was 38.71mW.

• Publications of The Korean Astronomical Society
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• v.22 no.3
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• pp.63-73
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• 2007

In this paper, we introduce the performance test results of digital data processing system for KVN (Korean VLBI Network). The digital data processing system for KVN consists of DAS (Data Acquisition System) and high-speed recorder which called Mark5B system. DAS system performs the digitalization of analog radio signal through ADS-1000 gigabit sampler with 1 Gsps/2-bit and process the digital filtering of digital signal. Mark5B system records the output data of DFB (Digital Filter Bank) with about 1 Gbps. In this paper, we carried out the preliminary evaluation experiments of the KVN digital data processing system connected between DAS system and Mark5B with VSI (VLBI Standard Interface) interface which is designed for compatible in each VLBI system. We first performed all of the KVN digital data processing system connected by VSI interface in the world. In factory inspection phase, we found that the DAS system has a memory read/write error in DSM (Digital Spectrometer) by analyzing the recorded data in Mark5B system. We confirmed that the DSM memory error has been correctly solved by comparing DSM results with Mark5B results. The effectiveness of KVN digital data processing system has been verified through the preliminary experiments such as data transmission, recording with VSI interface connection and data analysis between DSM and Mark5B system. In future work, we will perform the real astronomical observation by using the KVN 21m radio telescopes so as to verify its stability and performance.