• 제목/요약/키워드: 1700 V breakdown voltage

검색결과 5건 처리시간 0.018초

SiC UMOSFET 구조에 따른 온도 신뢰성 분석 (Temperature Reliability Analysis based on SiC UMOSFET Structure)

  • 이정연;김광수
    • 전기전자학회논문지
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    • 제24권1호
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    • pp.284-292
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    • 2020
  • SiC 기반 소자는 silicon 소자 대비 1200V 이상의 고전압 환경에서 우수하게 동작하며 특히 매우 높은 온도에서 안정적인 특성을 보여준다. 따라서 최근 1700V급 UMOSFET이 전기 자동차, 항공기 등의 전력시스템의 사용을 목표로 활발하게 연구개발 되고 있다. 본 논문에서는 최근 연구되고 있는 세 종류의 1700급 UMOSFET-Conventional UMOSFET (C-UMOSFET), Source Trench UMOSFET (ST-UMOSFET), Local Floating Superjunction UMOSFET (LFS-UMOSFET)-에 대해 온도 변화(300K-600K)에 따른 전력소자에서 중요한 변수 (breakdown voltage(BV), on-resistance(Ron), threshold voltage(vth), transconductance(gm))의 신뢰성 특성을 비교 분석하였다. 세 소자 모두 온도 증가에 따른 BV 증가, Ron 증가, vth 감소, gm 감소를 확인하였다. 그러나 세 소자의 구조 차이에 따라 BV, Ron vth, gm 변화에 차이가 있어 그 정도 및 원인에 대해 비교 분석하였다. 모든 결과는 sentaurus TCAD을 통해 simulation 되었다.

높은 항복전압을 위한 최적 계단산화막의 쇼트키 다이오드 (The Schottky Diode of Optimal Stepped Oxide Layer for High Breakdown Voltage)

  • 이용재;이문기;김봉렬
    • 대한전자공학회논문지
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    • 제23권4호
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    • pp.484-489
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    • 1986
  • A device with variable stepped oxide layer along the edge region of Schottky junction have been designed and fabricated. The effect of this stepped oxide layer in the edge region improves the breakdown voltage as a result of the by increase of the depletion layer width, and decreases the leakage current as compared to the effect of conventional field oxide layer, when the reverse voltage was applied. Experimental results shown that the Schottky diode with the the reverse voltage was applied. Experimenal results show that the Schottky diode with the optimal stepped oxide layer maintains nearly ideal I-V characteristics and excellent breakdown voltage(170V) by reducing the edge effect inherent in metal-semiconductor contacts. The optimal conditions of stepped oxide layer are 1700\ulcornerin thickness and 10\ulcorner in length.

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1700 V급 EST소자의 설계 및 제작에 관한 연구 (Design and Fabrication of 1700 V Emitter Switched Thyristor)

  • 강이구;안병섭;남태진
    • 한국전기전자재료학회논문지
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    • 제23권3호
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    • pp.183-189
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    • 2010
  • In this paper, the trench gate emitter switched thyristor(EST) withl trench gate electrode is proposed for improving snap-back effect which leads to a lot of problems in device applications. The parasitic thyristor which is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The dual trench gate allows homogenous current distribution in the EST and preserves the unique feature of the gate controlled current saturation of the thyristor current. The characteristics of the 1700 V forward blocking EST obtained from two-dimensional numerical simulations (MEDICI) is described and compared with that of a conventional EST. we carried out layout, design and process of EST devices.

An analysis of new IGBT(Insulator Gate Bipolar Transistor) structure having a additional recessedwith E-field shielding layer

  • 유승우;이한신;강이구;성만영
    • 전기전자학회논문지
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    • 제11권4호
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    • pp.247-251
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    • 2007
  • The recessed gate IGBT has a lower on-state voltage drop compared with the DMOS IGBT, because there is no JFET resistance. But because of the electric field concentration in the corner of the gate edge, the breakdown voltage decreases. This paper is about the new structure to effectively improve the Vce(sat) voltage without breakdown voltage drop in 1700V NPT type recessed gate IGBT with p floating shielding layer. For the fabrication of the recessed gate IGBT with p floating shielding layer, it is necessary to perform the only one implant step for the shielding layer. Analysis on the Breakdown voltage shows the improved values compared to the conventional recessed gate IGBT structures. The result shows the improvement on Breakdown voltage without worsening other characteristics of the device. The electrical characteristics were studied by MEDICI simulation results.

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3.3V 동작 68% 효율, 디지털 휴대전화기용 고효율 GaAs MESFET 전력소자 특성 (A 3.3V, 68% power added efficieny, GaAs power MESFET for mobile digital hand-held phone)

  • 이종남;김해천;문재경;이재진;박형무
    • 전자공학회논문지A
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    • 제32A권6호
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    • pp.41-50
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    • 1995
  • A state-of-the-arts GaAs power metal semiconductor field effect transistor (MESFET) for 3.3V operation digital hand-held phone at 900 MHz has been developed for the first time, The FET was fabricated using a low-high doped structures grown by molecular beam epitaxy (MBE). The fabricated MESFETs with a gate width of 16 mm and a gate length of 0.8 .mu.m shows a saturated drain current (Idss) of 4.2A and a transconductance (Gm) of around 1700mS at a gate bias of -2.1V, corresponding to 10% Idss. The gate-to-drain breakdown voltage is measured to be 28 V. The rf characteristics of the MESFET tested at a drain bias of 3.3 V and a frequencyof 900 MHz are the output power of 32.3 dBm, the power added efficiency of 68%, and the third-ordr intercept point of 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order inter modulation.

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